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This file is a list of the people responsible for ensuring that patches for a |
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particular part of LLVM are reviewed, either by themself or by someone else. |
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They are also the gatekeepers for their part of LLVM, with the final word on |
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what goes in or not. |
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|
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The list is sorted by surname and formatted to allow easy grepping and |
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beautification by scripts. The fields are: name (N), email (E), web-address |
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(W), PGP key ID and fingerprint (P), description (D), and snail-mail address |
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(S). |
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|
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N: Joe Abbey |
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E: jabbey@arxan.com |
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D: LLVM Bitcode (lib/Bitcode/* include/llvm/Bitcode/*) |
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|
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N: Owen Anderson |
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E: resistor@mac.com |
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D: SelectionDAG (lib/CodeGen/SelectionDAG/*) |
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|
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N: Rafael Avila de Espindola |
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E: rafael.espindola@gmail.com |
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D: Gold plugin (tools/gold/*) |
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|
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N: Chandler Carruth |
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E: chandlerc@gmail.com |
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E: chandlerc@google.com |
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D: Config, ADT, Support, inlining & related passes, SROA/mem2reg & related passes, CMake, library layering |
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|
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N: Evan Cheng |
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E: evan.cheng@apple.com |
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D: ARM target, parts of code generator not covered by someone else |
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|
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N: Eric Christopher |
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E: echristo@gmail.com |
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D: Debug Information, autotools/configure/make build, inline assembly |
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|
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N: Greg Clayton |
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D: LLDB |
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|
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N: Peter Collingbourne |
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D: libclc |
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|
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N: Anshuman Dasgupta |
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E: adasgupt@codeaurora.org |
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D: Hexagon Backend |
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|
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N: Hal Finkel |
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E: hfinkel@anl.gov |
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D: BBVectorize and the PowerPC target |
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|
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N: Venkatraman Govindaraju |
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E: venkatra@cs.wisc.edu |
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D: Sparc Backend (lib/Target/Sparc/*) |
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|
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N: Tobias Grosser |
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D: Polly |
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|
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N: James Grosbach |
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E: grosbach@apple.com |
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D: MC layer |
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|
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N: Howard Hinnant |
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D: libc++ |
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|
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N: Justin Holewinski |
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E: jholewinski@nvidia.com |
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D: NVPTX Target (lib/Target/NVPTX/*) |
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|
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N: Andy Kaylor |
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E: andrew.kaylor@intel.com |
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D: MCJIT, RuntimeDyld and JIT event listeners |
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|
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N: Galina Kistanova |
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E: gkistanova@gmail.com |
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D: LLVM Buildbot |
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|
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N: Anton Korobeynikov |
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E: anton@korobeynikov.info |
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D: Exception handling, Windows codegen, ARM EABI |
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|
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N: Benjamin Kramer |
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E: benny.kra@gmail.com |
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D: DWARF Parser |
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|
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N: Sergei Larin |
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E: slarin@codeaurora.org |
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D: VLIW Instruction Scheduling, Packetization |
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|
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N: Chris Lattner |
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E: sabre@nondot.org |
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W: http://nondot.org/~sabre/ |
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D: Everything not covered by someone else |
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|
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N: Tim Northover |
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E: Tim.Northover@arm.com |
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D: AArch64 backend |
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|
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N: Jakob Olesen |
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D: Register allocators and TableGen |
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|
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N: Richard Osborne |
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E: richard@xmos.com |
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D: XCore Backend |
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|
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N: Chad Rosier |
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E: mcrosier@apple.com |
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D: Fast-Isel |
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|
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N: Nadav Rotem |
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E: nrotem@apple.com |
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D: X86 Backend, Loop Vectorizer |
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|
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N: Richard Sandiford |
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E: rsandifo@linux.vnet.ibm.com |
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D: SystemZ Backend |
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|
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N: Duncan Sands |
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E: baldrick@free.fr |
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D: DragonEgg |
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|
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N: Michael Spencer |
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E: bigcheesegs@gmail.com |
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D: Windows parts of Support, Object, ar, nm, objdump, ranlib, size |
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|
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N: Tom Stellard |
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E: thomas.stellard@amd.com |
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E: mesa-dev@lists.freedesktop.org |
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D: R600 Backend |
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|
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N: Andrew Trick |
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E: atrick@apple.com |
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D: IndVar Simplify, Loop Strength Reduction, Instruction Scheduling |
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|
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N: Bill Wendling |
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E: wendling@apple.com |
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D: libLTO, IR Linker |