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Searched refs:AtomicRMWInst (Results 1 – 25 of 43) sorted by relevance

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/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDLowerAtomic.cpp43 static bool LowerAtomicRMWInst(AtomicRMWInst *RMWI) { in LowerAtomicRMWInst()
53 case AtomicRMWInst::Xchg: in LowerAtomicRMWInst()
56 case AtomicRMWInst::Add: in LowerAtomicRMWInst()
59 case AtomicRMWInst::Sub: in LowerAtomicRMWInst()
62 case AtomicRMWInst::And: in LowerAtomicRMWInst()
65 case AtomicRMWInst::Nand: in LowerAtomicRMWInst()
68 case AtomicRMWInst::Or: in LowerAtomicRMWInst()
71 case AtomicRMWInst::Xor: in LowerAtomicRMWInst()
74 case AtomicRMWInst::Max: in LowerAtomicRMWInst()
78 case AtomicRMWInst::Min: in LowerAtomicRMWInst()
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/NextBSD/contrib/llvm/lib/CodeGen/
HDAtomicExpandPass.cpp51 bool tryExpandAtomicRMW(AtomicRMWInst *AI);
52 bool expandAtomicRMWToLLSC(AtomicRMWInst *AI);
53 bool expandAtomicRMWToCmpXchg(AtomicRMWInst *AI);
55 bool isIdempotentRMW(AtomicRMWInst *AI);
56 bool simplifyIdempotentRMW(AtomicRMWInst *AI);
88 auto RMWI = dyn_cast<AtomicRMWInst>(I); in runOnFunction()
220 AtomicRMWInst *AI = in expandAtomicStore()
221 Builder.CreateAtomicRMW(AtomicRMWInst::Xchg, SI->getPointerOperand(), in expandAtomicStore()
229 bool AtomicExpand::tryExpandAtomicRMW(AtomicRMWInst *AI) { in tryExpandAtomicRMW()
250 static Value *performAtomicOp(AtomicRMWInst::BinOp Op, IRBuilder<> &Builder, in performAtomicOp()
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/NextBSD/contrib/llvm/lib/Transforms/Instrumentation/
HDThreadSanitizer.cpp112 Function *TsanAtomicRMW[AtomicRMWInst::LAST_BINOP + 1][kNumberOfAccessSizes];
179 for (int op = AtomicRMWInst::FIRST_BINOP; in initializeCallbacks()
180 op <= AtomicRMWInst::LAST_BINOP; ++op) { in initializeCallbacks()
183 if (op == AtomicRMWInst::Xchg) in initializeCallbacks()
185 else if (op == AtomicRMWInst::Add) in initializeCallbacks()
187 else if (op == AtomicRMWInst::Sub) in initializeCallbacks()
189 else if (op == AtomicRMWInst::And) in initializeCallbacks()
191 else if (op == AtomicRMWInst::Or) in initializeCallbacks()
193 else if (op == AtomicRMWInst::Xor) in initializeCallbacks()
195 else if (op == AtomicRMWInst::Nand) in initializeCallbacks()
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HDBoundsChecking.cpp183 isa<AtomicRMWInst>(I)) in runOnFunction()
201 } else if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(Inst)) { in runOnFunction()
/NextBSD/contrib/llvm/lib/IR/
HDInstruction.cpp308 if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I1)) in haveSameSpecialState()
309 return RMWI->getOperation() == cast<AtomicRMWInst>(I2)->getOperation() && in haveSameSpecialState()
310 RMWI->isVolatile() == cast<AtomicRMWInst>(I2)->isVolatile() && in haveSameSpecialState()
311 RMWI->getOrdering() == cast<AtomicRMWInst>(I2)->getOrdering() && in haveSameSpecialState()
312 RMWI->getSynchScope() == cast<AtomicRMWInst>(I2)->getSynchScope(); in haveSameSpecialState()
HDAsmWriter.cpp1024 AtomicRMWInst::BinOp Op) { in writeAtomicRMWOperation()
1027 case AtomicRMWInst::Xchg: Out << " xchg"; break; in writeAtomicRMWOperation()
1028 case AtomicRMWInst::Add: Out << " add"; break; in writeAtomicRMWOperation()
1029 case AtomicRMWInst::Sub: Out << " sub"; break; in writeAtomicRMWOperation()
1030 case AtomicRMWInst::And: Out << " and"; break; in writeAtomicRMWOperation()
1031 case AtomicRMWInst::Nand: Out << " nand"; break; in writeAtomicRMWOperation()
1032 case AtomicRMWInst::Or: Out << " or"; break; in writeAtomicRMWOperation()
1033 case AtomicRMWInst::Xor: Out << " xor"; break; in writeAtomicRMWOperation()
1034 case AtomicRMWInst::Max: Out << " max"; break; in writeAtomicRMWOperation()
1035 case AtomicRMWInst::Min: Out << " min"; break; in writeAtomicRMWOperation()
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HDInstructions.cpp1130 void AtomicRMWInst::Init(BinOp Operation, Value *Ptr, Value *Val, in Init()
1150 AtomicRMWInst::AtomicRMWInst(BinOp Operation, Value *Ptr, Value *Val, in AtomicRMWInst() function in AtomicRMWInst
1155 OperandTraits<AtomicRMWInst>::op_begin(this), in AtomicRMWInst()
1156 OperandTraits<AtomicRMWInst>::operands(this), in AtomicRMWInst()
1161 AtomicRMWInst::AtomicRMWInst(BinOp Operation, Value *Ptr, Value *Val, in AtomicRMWInst() function in AtomicRMWInst
1166 OperandTraits<AtomicRMWInst>::op_begin(this), in AtomicRMWInst()
1167 OperandTraits<AtomicRMWInst>::operands(this), in AtomicRMWInst()
3507 AtomicRMWInst *AtomicRMWInst::cloneImpl() const { in cloneImpl()
3508 AtomicRMWInst *Result = in cloneImpl()
3509 new AtomicRMWInst(getOperation(),getOperand(0), getOperand(1), in cloneImpl()
HDCore.cpp2770 AtomicRMWInst::BinOp intop; in LLVMBuildAtomicRMW()
2772 case LLVMAtomicRMWBinOpXchg: intop = AtomicRMWInst::Xchg; break; in LLVMBuildAtomicRMW()
2773 case LLVMAtomicRMWBinOpAdd: intop = AtomicRMWInst::Add; break; in LLVMBuildAtomicRMW()
2774 case LLVMAtomicRMWBinOpSub: intop = AtomicRMWInst::Sub; break; in LLVMBuildAtomicRMW()
2775 case LLVMAtomicRMWBinOpAnd: intop = AtomicRMWInst::And; break; in LLVMBuildAtomicRMW()
2776 case LLVMAtomicRMWBinOpNand: intop = AtomicRMWInst::Nand; break; in LLVMBuildAtomicRMW()
2777 case LLVMAtomicRMWBinOpOr: intop = AtomicRMWInst::Or; break; in LLVMBuildAtomicRMW()
2778 case LLVMAtomicRMWBinOpXor: intop = AtomicRMWInst::Xor; break; in LLVMBuildAtomicRMW()
2779 case LLVMAtomicRMWBinOpMax: intop = AtomicRMWInst::Max; break; in LLVMBuildAtomicRMW()
2780 case LLVMAtomicRMWBinOpMin: intop = AtomicRMWInst::Min; break; in LLVMBuildAtomicRMW()
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/NextBSD/contrib/llvm/include/llvm/Analysis/
HDMemoryLocation.h69 static MemoryLocation get(const AtomicRMWInst *RMWI);
79 else if (auto *I = dyn_cast<AtomicRMWInst>(Inst)) in get()
HDAliasAnalysis.h350 return getModRefInfo((const AtomicRMWInst*)I, Loc); in getModRefInfo()
441 ModRefResult getModRefInfo(const AtomicRMWInst *RMW,
445 ModRefResult getModRefInfo(const AtomicRMWInst *RMW, in getModRefInfo()
/NextBSD/contrib/llvm/lib/Target/CppBackend/
HDCPPBackend.cpp1588 const AtomicRMWInst *rmwi = cast<AtomicRMWInst>(I); in printInstruction()
1593 case AtomicRMWInst::Xchg: Operation = "AtomicRMWInst::Xchg"; break; in printInstruction()
1594 case AtomicRMWInst::Add: Operation = "AtomicRMWInst::Add"; break; in printInstruction()
1595 case AtomicRMWInst::Sub: Operation = "AtomicRMWInst::Sub"; break; in printInstruction()
1596 case AtomicRMWInst::And: Operation = "AtomicRMWInst::And"; break; in printInstruction()
1597 case AtomicRMWInst::Nand: Operation = "AtomicRMWInst::Nand"; break; in printInstruction()
1598 case AtomicRMWInst::Or: Operation = "AtomicRMWInst::Or"; break; in printInstruction()
1599 case AtomicRMWInst::Xor: Operation = "AtomicRMWInst::Xor"; break; in printInstruction()
1600 case AtomicRMWInst::Max: Operation = "AtomicRMWInst::Max"; break; in printInstruction()
1601 case AtomicRMWInst::Min: Operation = "AtomicRMWInst::Min"; break; in printInstruction()
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/NextBSD/contrib/llvm/tools/clang/lib/CodeGen/
HDCGStmtOpenMP.cpp1778 llvm::AtomicRMWInst::BinOp RMWOp; in emitOMPAtomicRMW()
1781 RMWOp = llvm::AtomicRMWInst::Add; in emitOMPAtomicRMW()
1786 RMWOp = llvm::AtomicRMWInst::Sub; in emitOMPAtomicRMW()
1789 RMWOp = llvm::AtomicRMWInst::And; in emitOMPAtomicRMW()
1792 RMWOp = llvm::AtomicRMWInst::Or; in emitOMPAtomicRMW()
1795 RMWOp = llvm::AtomicRMWInst::Xor; in emitOMPAtomicRMW()
1799 ? (IsXLHSInRHSPart ? llvm::AtomicRMWInst::Min in emitOMPAtomicRMW()
1800 : llvm::AtomicRMWInst::Max) in emitOMPAtomicRMW()
1801 : (IsXLHSInRHSPart ? llvm::AtomicRMWInst::UMin in emitOMPAtomicRMW()
1802 : llvm::AtomicRMWInst::UMax); in emitOMPAtomicRMW()
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HDCGAtomic.cpp498 llvm::AtomicRMWInst::BinOp Op = llvm::AtomicRMWInst::Add; in EmitAtomicOp()
571 Op = llvm::AtomicRMWInst::Xchg; in EmitAtomicOp()
579 Op = llvm::AtomicRMWInst::Add; in EmitAtomicOp()
587 Op = llvm::AtomicRMWInst::Sub; in EmitAtomicOp()
595 Op = llvm::AtomicRMWInst::And; in EmitAtomicOp()
603 Op = llvm::AtomicRMWInst::Or; in EmitAtomicOp()
611 Op = llvm::AtomicRMWInst::Xor; in EmitAtomicOp()
618 Op = llvm::AtomicRMWInst::Nand; in EmitAtomicOp()
624 llvm::AtomicRMWInst *RMWI = in EmitAtomicOp()
HDCGBuiltin.cpp86 llvm::AtomicRMWInst::BinOp Kind, in MakeBinaryAtomicValue()
115 llvm::AtomicRMWInst::BinOp Kind, in EmitBinaryAtomic()
124 llvm::AtomicRMWInst::BinOp Kind, in EmitBinaryAtomicPost()
1013 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); in EmitBuiltinExpr()
1019 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); in EmitBuiltinExpr()
1025 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); in EmitBuiltinExpr()
1031 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); in EmitBuiltinExpr()
1037 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); in EmitBuiltinExpr()
1043 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); in EmitBuiltinExpr()
1047 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); in EmitBuiltinExpr()
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HDCGExprScalar.cpp1682 return Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, in EmitScalarPrePostIncDec()
1693 llvm::AtomicRMWInst::BinOp aop = isInc ? llvm::AtomicRMWInst::Add : in EmitScalarPrePostIncDec()
1694 llvm::AtomicRMWInst::Sub; in EmitScalarPrePostIncDec()
2150 llvm::AtomicRMWInst::BinOp aop = llvm::AtomicRMWInst::BAD_BINOP; in EmitCompoundAssignLValue()
2159 aop = llvm::AtomicRMWInst::Add; in EmitCompoundAssignLValue()
2162 aop = llvm::AtomicRMWInst::Sub; in EmitCompoundAssignLValue()
2165 aop = llvm::AtomicRMWInst::And; in EmitCompoundAssignLValue()
2168 aop = llvm::AtomicRMWInst::Xor; in EmitCompoundAssignLValue()
2171 aop = llvm::AtomicRMWInst::Or; in EmitCompoundAssignLValue()
2176 if (aop != llvm::AtomicRMWInst::BAD_BINOP) { in EmitCompoundAssignLValue()
/NextBSD/contrib/llvm/lib/Bitcode/Writer/
HDBitcodeWriter.cpp106 static unsigned GetEncodedRMWOperation(AtomicRMWInst::BinOp Op) { in GetEncodedRMWOperation()
109 case AtomicRMWInst::Xchg: return bitc::RMW_XCHG; in GetEncodedRMWOperation()
110 case AtomicRMWInst::Add: return bitc::RMW_ADD; in GetEncodedRMWOperation()
111 case AtomicRMWInst::Sub: return bitc::RMW_SUB; in GetEncodedRMWOperation()
112 case AtomicRMWInst::And: return bitc::RMW_AND; in GetEncodedRMWOperation()
113 case AtomicRMWInst::Nand: return bitc::RMW_NAND; in GetEncodedRMWOperation()
114 case AtomicRMWInst::Or: return bitc::RMW_OR; in GetEncodedRMWOperation()
115 case AtomicRMWInst::Xor: return bitc::RMW_XOR; in GetEncodedRMWOperation()
116 case AtomicRMWInst::Max: return bitc::RMW_MAX; in GetEncodedRMWOperation()
117 case AtomicRMWInst::Min: return bitc::RMW_MIN; in GetEncodedRMWOperation()
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/NextBSD/contrib/llvm/lib/Transforms/IPO/
HDMergeFunctions.cpp844 if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(L)) { in cmpOperations()
846 cast<AtomicRMWInst>(R)->getOperation())) in cmpOperations()
849 cast<AtomicRMWInst>(R)->isVolatile())) in cmpOperations()
852 cast<AtomicRMWInst>(R)->getOrdering())) in cmpOperations()
855 cast<AtomicRMWInst>(R)->getSynchScope()); in cmpOperations()
/NextBSD/contrib/llvm/lib/Bitcode/Reader/
HDBitcodeReader.cpp646 static AtomicRMWInst::BinOp getDecodedRMWOperation(unsigned Val) { in getDecodedRMWOperation()
648 default: return AtomicRMWInst::BAD_BINOP; in getDecodedRMWOperation()
649 case bitc::RMW_XCHG: return AtomicRMWInst::Xchg; in getDecodedRMWOperation()
650 case bitc::RMW_ADD: return AtomicRMWInst::Add; in getDecodedRMWOperation()
651 case bitc::RMW_SUB: return AtomicRMWInst::Sub; in getDecodedRMWOperation()
652 case bitc::RMW_AND: return AtomicRMWInst::And; in getDecodedRMWOperation()
653 case bitc::RMW_NAND: return AtomicRMWInst::Nand; in getDecodedRMWOperation()
654 case bitc::RMW_OR: return AtomicRMWInst::Or; in getDecodedRMWOperation()
655 case bitc::RMW_XOR: return AtomicRMWInst::Xor; in getDecodedRMWOperation()
656 case bitc::RMW_MAX: return AtomicRMWInst::Max; in getDecodedRMWOperation()
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/NextBSD/contrib/llvm/lib/Analysis/
HDMemoryLocation.cpp57 MemoryLocation MemoryLocation::get(const AtomicRMWInst *RMWI) { in get()
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonISelLowering.h221 AtomicRMWExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) in shouldExpandAtomicRMWInIR()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86ISelLowering.h1048 shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override;
1051 lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *AI) const override;
/NextBSD/contrib/llvm/include/llvm/IR/
HDInstVisitor.h178 RetTy visitAtomicRMWInst(AtomicRMWInst &I) { DELEGATE(Instruction);} in visitAtomicRMWInst()
HDInstruction.def138 HANDLE_MEMORY_INST(32, AtomicRMW , AtomicRMWInst )
HDInstructions.h674 class AtomicRMWInst : public Instruction {
679 AtomicRMWInst *cloneImpl() const;
719 AtomicRMWInst(BinOp Operation, Value *Ptr, Value *Val,
722 AtomicRMWInst(BinOp Operation, Value *Ptr, Value *Val,
809 struct OperandTraits<AtomicRMWInst>
810 : public FixedNumOperandTraits<AtomicRMWInst,2> {
813 DEFINE_TRANSPARENT_OPERAND_ACCESSORS(AtomicRMWInst, Value)
/NextBSD/contrib/llvm/lib/AsmParser/
HDLLParser.cpp5502 AtomicRMWInst::BinOp Operation; in ParseAtomicRMW()
5509 case lltok::kw_xchg: Operation = AtomicRMWInst::Xchg; break; in ParseAtomicRMW()
5510 case lltok::kw_add: Operation = AtomicRMWInst::Add; break; in ParseAtomicRMW()
5511 case lltok::kw_sub: Operation = AtomicRMWInst::Sub; break; in ParseAtomicRMW()
5512 case lltok::kw_and: Operation = AtomicRMWInst::And; break; in ParseAtomicRMW()
5513 case lltok::kw_nand: Operation = AtomicRMWInst::Nand; break; in ParseAtomicRMW()
5514 case lltok::kw_or: Operation = AtomicRMWInst::Or; break; in ParseAtomicRMW()
5515 case lltok::kw_xor: Operation = AtomicRMWInst::Xor; break; in ParseAtomicRMW()
5516 case lltok::kw_max: Operation = AtomicRMWInst::Max; break; in ParseAtomicRMW()
5517 case lltok::kw_min: Operation = AtomicRMWInst::Min; break; in ParseAtomicRMW()
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