| /NextBSD/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
| HD | MipsTargetStreamer.cpp | 728 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 737 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 738 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 747 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 748 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 771 Inst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpsetup() 776 Inst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpsetup() 790 Inst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpsetup() 797 Inst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpsetup() 798 Inst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpsetup() [all …]
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| /NextBSD/contrib/binutils/gas/doc/ |
| HD | c-ia64.texi | 37 as using the ``constant GP'' model. With this model, it is assumed 38 that the entire program uses a single global pointer (GP) value. Note 45 as using the ``constant GP without function descriptor'' data model. 46 This model is like the ``constant GP'' model, except that it 50 descriptor, which contains both the code entry-point and the GP-value
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| HD | c-alpha.texi | 243 Used with @code{ldah} and @code{lda} to load the GP from the current 258 32-bit displacement from the GP. 262 32-bit displacement from the GP. 266 from the GP. 269 Used with any branch format instruction to skip the GP load at the 270 target address. The referenced symbol must have the same GP as the 272 or perform a standard GP load in the first two instructions via the 384 to perform a load of the GP register; 2 indicates that @code{$27} is 395 instructions of the function perform a GP load. 402 GP for the current object file, and stores it in 4 bytes. In addition
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonRegisterInfo.td | 143 def GP : Rc<11, "gp">, DwarfRegNum<[77]>; 156 def C11_10 : Rcc<10, "c11:10", [UGP, GP]>, DwarfRegNum<[76]>; 192 USR, USR_OVF, UGP, GP, PC)>;
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| /NextBSD/share/syscons/fonts/ |
| HD | iso05-8x14.fnt | 73 M``````!\QL#`QGP``````````'Y:&!@8&```````````QL;&QL9^!GP````` 82 =````*!``QL;&QL9^!GP```````#&QL;^.#@`````
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| HD | swiss-1251-8x16.fnt | 44 M`'S`<!P&!GP````````0,##\,#`P,#`<````````````QL;&QL;&?``````` 70 M!@8&!@8&QL9\``!\QL#`8#@,!@;&?````````````'S`<!P&!GP``````&9F
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| HD | iso-thin-8x16.fnt | 38 M0D)"0GP````````````\0D!`0$(\`````````@("/D)"0D)"/@``````````
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| HD | iso08-8x16.fnt | 65 MLJJJ@GP```````#_````````````````````.&QL.```````````````````
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| HD | iso15-thin-8x16.fnt | 38 M0D)"0GP````````````\0D!`0$(\`````````@("/D)"0D)"/@``````````
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| HD | iso05-8x8.fnt | 45 M8&!\9GP```!\!CX&?````,[;^]O.````/F8^-F8`BLWJN)N(BP`D`#QF?F`\
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| HD | koi8-u-8x8.fnt | 41 M/````-M^/'[;````?&9\9GP```!@8'QF?````,;&]M[V````/&8,9CP```#;
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| HD | koi8-r-8x8.fnt | 41 M/````-M^/'[;````?&9\9GP```!@8'QF?````,;&]M[V````/&8,9CP```#;
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| HD | cp866u-8x8.fnt | 45 M8&!\9GP```!\!CX&?````,[;^]O.````/F8^-F8`9@!^8'Q@?@`D`#QF?F`\
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| HD | cp1251-8x14.fnt | 57 M`````````'R2JK*J@GP```````!F`#P8&!@8&!@8/``````````0*"@0````
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| /NextBSD/contrib/gcc/config/mips/ |
| HD | t-sb1 | 1 # GP-rel: G0 only
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| /NextBSD/sys/mips/mips/ |
| HD | exception.S | 296 SAVE_REG(gp, GP, sp) ;\ 366 RESTORE_REG(gp, GP, sp) ;\ 469 SAVE_U_PCB_REG(gp, GP, k1) 481 PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP 559 RESTORE_U_PCB_REG(gp, GP, k1) 712 SAVE_U_PCB_REG(gp, GP, k1) 739 PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP 827 RESTORE_U_PCB_REG(gp, GP, k1)
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| /NextBSD/lib/libc/mips/gen/ |
| HD | _setjmp.S | 194 * our caller's GP.
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| /NextBSD/contrib/llvm/lib/Target/Mips/ |
| HD | MipsRegisterInfo.cpp | 160 Reserved.set(Mips::GP); in getReservedRegs() 227 Reserved.set(Mips::GP); in getReservedRegs()
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| HD | MipsOptimizePICCall.cpp | 148 unsigned Reg = Ty == MVT::i32 ? Mips::GP : Mips::GP_64; in eraseGPOpnd()
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| HD | MipsRegisterInfo.td | 116 def GP : MipsGPRReg< 28, "gp">, DwarfRegNum<[28]>; 150 def GP_64 : Mips64GPRReg< 28, "gp", [GP]>, DwarfRegNum<[28]>; 290 K0, K1, GP, SP, FP, RA)>;
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| /NextBSD/sys/mips/include/ |
| HD | regnum.h | 89 #define GP 28 macro
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| /NextBSD/sys/gnu/dts/arm/ |
| HD | armada-xp-gp.dts | 3 * (DB-MV784MP-GP) 64 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
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| HD | armada-388-gp.dts | 3 * (RD-88F6820-GP) 47 model = "Marvell Armada 385 GP";
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| /NextBSD/sys/boot/pc98/btx/btx/ |
| HD | btx.S | 339 push $0xd # Int 0xd: #GP 679 leal -0x18(%esi),%edi # Kernel stack GP regs 681 movl $MEM_ESPR-0x0c,%esi # Real mode stack GP regs 682 movl $8,%ecx # Copy GP regs from
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| /NextBSD/sys/boot/i386/btx/btx/ |
| HD | btx.S | 337 push $0xd # Int 0xd: #GP 653 leal -0x18(%esi),%edi # Kernel stack GP regs 655 movl $MEM_ESPR-0x0c,%esi # Real mode stack GP regs 656 movl $8,%ecx # Copy GP regs from
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