1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target streamer methods.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbolELF.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/ELF.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
27
28 using namespace llvm;
29
MipsTargetStreamer(MCStreamer & S)30 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
31 : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
32 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
33 }
emitDirectiveSetMicroMips()34 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
emitDirectiveSetNoMicroMips()35 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
emitDirectiveSetMips16()36 void MipsTargetStreamer::emitDirectiveSetMips16() {}
emitDirectiveSetNoMips16()37 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
emitDirectiveSetReorder()38 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
emitDirectiveSetNoReorder()39 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
emitDirectiveSetMacro()40 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
emitDirectiveSetNoMacro()41 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
emitDirectiveSetMsa()42 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
emitDirectiveSetNoMsa()43 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
emitDirectiveSetAt()44 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
emitDirectiveSetAtWithArg(unsigned RegNo)45 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
46 forbidModuleDirective();
47 }
emitDirectiveSetNoAt()48 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
emitDirectiveEnd(StringRef Name)49 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
emitDirectiveEnt(const MCSymbol & Symbol)50 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
emitDirectiveAbiCalls()51 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
emitDirectiveNaN2008()52 void MipsTargetStreamer::emitDirectiveNaN2008() {}
emitDirectiveNaNLegacy()53 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
emitDirectiveOptionPic0()54 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
emitDirectiveOptionPic2()55 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
emitDirectiveInsn()56 void MipsTargetStreamer::emitDirectiveInsn() { forbidModuleDirective(); }
emitFrame(unsigned StackReg,unsigned StackSize,unsigned ReturnReg)57 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
58 unsigned ReturnReg) {}
emitMask(unsigned CPUBitmask,int CPUTopSavedRegOff)59 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
emitFMask(unsigned FPUBitmask,int FPUTopSavedRegOff)60 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
61 }
emitDirectiveSetArch(StringRef Arch)62 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
63 forbidModuleDirective();
64 }
emitDirectiveSetMips0()65 void MipsTargetStreamer::emitDirectiveSetMips0() { forbidModuleDirective(); }
emitDirectiveSetMips1()66 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
emitDirectiveSetMips2()67 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
emitDirectiveSetMips3()68 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
emitDirectiveSetMips4()69 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
emitDirectiveSetMips5()70 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
emitDirectiveSetMips32()71 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
emitDirectiveSetMips32R2()72 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
emitDirectiveSetMips32R3()73 void MipsTargetStreamer::emitDirectiveSetMips32R3() { forbidModuleDirective(); }
emitDirectiveSetMips32R5()74 void MipsTargetStreamer::emitDirectiveSetMips32R5() { forbidModuleDirective(); }
emitDirectiveSetMips32R6()75 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
emitDirectiveSetMips64()76 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
emitDirectiveSetMips64R2()77 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
emitDirectiveSetMips64R3()78 void MipsTargetStreamer::emitDirectiveSetMips64R3() { forbidModuleDirective(); }
emitDirectiveSetMips64R5()79 void MipsTargetStreamer::emitDirectiveSetMips64R5() { forbidModuleDirective(); }
emitDirectiveSetMips64R6()80 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
emitDirectiveSetPop()81 void MipsTargetStreamer::emitDirectiveSetPop() { forbidModuleDirective(); }
emitDirectiveSetPush()82 void MipsTargetStreamer::emitDirectiveSetPush() { forbidModuleDirective(); }
emitDirectiveSetSoftFloat()83 void MipsTargetStreamer::emitDirectiveSetSoftFloat() {
84 forbidModuleDirective();
85 }
emitDirectiveSetHardFloat()86 void MipsTargetStreamer::emitDirectiveSetHardFloat() {
87 forbidModuleDirective();
88 }
emitDirectiveSetDsp()89 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
emitDirectiveSetNoDsp()90 void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
emitDirectiveCpLoad(unsigned RegNo)91 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
emitDirectiveCpsetup(unsigned RegNo,int RegOrOffset,const MCSymbol & Sym,bool IsReg)92 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
93 const MCSymbol &Sym, bool IsReg) {
94 }
95
emitDirectiveModuleFP()96 void MipsTargetStreamer::emitDirectiveModuleFP() {}
97
emitDirectiveModuleOddSPReg()98 void MipsTargetStreamer::emitDirectiveModuleOddSPReg() {
99 if (!ABIFlagsSection.OddSPReg && !ABIFlagsSection.Is32BitABI)
100 report_fatal_error("+nooddspreg is only valid for O32");
101 }
emitDirectiveModuleSoftFloat()102 void MipsTargetStreamer::emitDirectiveModuleSoftFloat() {}
emitDirectiveModuleHardFloat()103 void MipsTargetStreamer::emitDirectiveModuleHardFloat() {}
emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value)104 void MipsTargetStreamer::emitDirectiveSetFp(
105 MipsABIFlagsSection::FpABIKind Value) {
106 forbidModuleDirective();
107 }
emitDirectiveSetOddSPReg()108 void MipsTargetStreamer::emitDirectiveSetOddSPReg() { forbidModuleDirective(); }
emitDirectiveSetNoOddSPReg()109 void MipsTargetStreamer::emitDirectiveSetNoOddSPReg() {
110 forbidModuleDirective();
111 }
112
MipsTargetAsmStreamer(MCStreamer & S,formatted_raw_ostream & OS)113 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
114 formatted_raw_ostream &OS)
115 : MipsTargetStreamer(S), OS(OS) {}
116
emitDirectiveSetMicroMips()117 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
118 OS << "\t.set\tmicromips\n";
119 forbidModuleDirective();
120 }
121
emitDirectiveSetNoMicroMips()122 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
123 OS << "\t.set\tnomicromips\n";
124 forbidModuleDirective();
125 }
126
emitDirectiveSetMips16()127 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
128 OS << "\t.set\tmips16\n";
129 forbidModuleDirective();
130 }
131
emitDirectiveSetNoMips16()132 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
133 OS << "\t.set\tnomips16\n";
134 MipsTargetStreamer::emitDirectiveSetNoMips16();
135 }
136
emitDirectiveSetReorder()137 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
138 OS << "\t.set\treorder\n";
139 MipsTargetStreamer::emitDirectiveSetReorder();
140 }
141
emitDirectiveSetNoReorder()142 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
143 OS << "\t.set\tnoreorder\n";
144 forbidModuleDirective();
145 }
146
emitDirectiveSetMacro()147 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
148 OS << "\t.set\tmacro\n";
149 MipsTargetStreamer::emitDirectiveSetMacro();
150 }
151
emitDirectiveSetNoMacro()152 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
153 OS << "\t.set\tnomacro\n";
154 MipsTargetStreamer::emitDirectiveSetNoMacro();
155 }
156
emitDirectiveSetMsa()157 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
158 OS << "\t.set\tmsa\n";
159 MipsTargetStreamer::emitDirectiveSetMsa();
160 }
161
emitDirectiveSetNoMsa()162 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
163 OS << "\t.set\tnomsa\n";
164 MipsTargetStreamer::emitDirectiveSetNoMsa();
165 }
166
emitDirectiveSetAt()167 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
168 OS << "\t.set\tat\n";
169 MipsTargetStreamer::emitDirectiveSetAt();
170 }
171
emitDirectiveSetAtWithArg(unsigned RegNo)172 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
173 OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
174 MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
175 }
176
emitDirectiveSetNoAt()177 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
178 OS << "\t.set\tnoat\n";
179 MipsTargetStreamer::emitDirectiveSetNoAt();
180 }
181
emitDirectiveEnd(StringRef Name)182 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
183 OS << "\t.end\t" << Name << '\n';
184 }
185
emitDirectiveEnt(const MCSymbol & Symbol)186 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
187 OS << "\t.ent\t" << Symbol.getName() << '\n';
188 }
189
emitDirectiveAbiCalls()190 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
191
emitDirectiveNaN2008()192 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
193
emitDirectiveNaNLegacy()194 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
195 OS << "\t.nan\tlegacy\n";
196 }
197
emitDirectiveOptionPic0()198 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
199 OS << "\t.option\tpic0\n";
200 }
201
emitDirectiveOptionPic2()202 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
203 OS << "\t.option\tpic2\n";
204 }
205
emitDirectiveInsn()206 void MipsTargetAsmStreamer::emitDirectiveInsn() {
207 MipsTargetStreamer::emitDirectiveInsn();
208 OS << "\t.insn\n";
209 }
210
emitFrame(unsigned StackReg,unsigned StackSize,unsigned ReturnReg)211 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
212 unsigned ReturnReg) {
213 OS << "\t.frame\t$"
214 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
215 << StackSize << ",$"
216 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
217 }
218
emitDirectiveSetArch(StringRef Arch)219 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
220 OS << "\t.set arch=" << Arch << "\n";
221 MipsTargetStreamer::emitDirectiveSetArch(Arch);
222 }
223
emitDirectiveSetMips0()224 void MipsTargetAsmStreamer::emitDirectiveSetMips0() {
225 OS << "\t.set\tmips0\n";
226 MipsTargetStreamer::emitDirectiveSetMips0();
227 }
228
emitDirectiveSetMips1()229 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
230 OS << "\t.set\tmips1\n";
231 MipsTargetStreamer::emitDirectiveSetMips1();
232 }
233
emitDirectiveSetMips2()234 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
235 OS << "\t.set\tmips2\n";
236 MipsTargetStreamer::emitDirectiveSetMips2();
237 }
238
emitDirectiveSetMips3()239 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
240 OS << "\t.set\tmips3\n";
241 MipsTargetStreamer::emitDirectiveSetMips3();
242 }
243
emitDirectiveSetMips4()244 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
245 OS << "\t.set\tmips4\n";
246 MipsTargetStreamer::emitDirectiveSetMips4();
247 }
248
emitDirectiveSetMips5()249 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
250 OS << "\t.set\tmips5\n";
251 MipsTargetStreamer::emitDirectiveSetMips5();
252 }
253
emitDirectiveSetMips32()254 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
255 OS << "\t.set\tmips32\n";
256 MipsTargetStreamer::emitDirectiveSetMips32();
257 }
258
emitDirectiveSetMips32R2()259 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
260 OS << "\t.set\tmips32r2\n";
261 MipsTargetStreamer::emitDirectiveSetMips32R2();
262 }
263
emitDirectiveSetMips32R3()264 void MipsTargetAsmStreamer::emitDirectiveSetMips32R3() {
265 OS << "\t.set\tmips32r3\n";
266 MipsTargetStreamer::emitDirectiveSetMips32R3();
267 }
268
emitDirectiveSetMips32R5()269 void MipsTargetAsmStreamer::emitDirectiveSetMips32R5() {
270 OS << "\t.set\tmips32r5\n";
271 MipsTargetStreamer::emitDirectiveSetMips32R5();
272 }
273
emitDirectiveSetMips32R6()274 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
275 OS << "\t.set\tmips32r6\n";
276 MipsTargetStreamer::emitDirectiveSetMips32R6();
277 }
278
emitDirectiveSetMips64()279 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
280 OS << "\t.set\tmips64\n";
281 MipsTargetStreamer::emitDirectiveSetMips64();
282 }
283
emitDirectiveSetMips64R2()284 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
285 OS << "\t.set\tmips64r2\n";
286 MipsTargetStreamer::emitDirectiveSetMips64R2();
287 }
288
emitDirectiveSetMips64R3()289 void MipsTargetAsmStreamer::emitDirectiveSetMips64R3() {
290 OS << "\t.set\tmips64r3\n";
291 MipsTargetStreamer::emitDirectiveSetMips64R3();
292 }
293
emitDirectiveSetMips64R5()294 void MipsTargetAsmStreamer::emitDirectiveSetMips64R5() {
295 OS << "\t.set\tmips64r5\n";
296 MipsTargetStreamer::emitDirectiveSetMips64R5();
297 }
298
emitDirectiveSetMips64R6()299 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
300 OS << "\t.set\tmips64r6\n";
301 MipsTargetStreamer::emitDirectiveSetMips64R6();
302 }
303
emitDirectiveSetDsp()304 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
305 OS << "\t.set\tdsp\n";
306 MipsTargetStreamer::emitDirectiveSetDsp();
307 }
308
emitDirectiveSetNoDsp()309 void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() {
310 OS << "\t.set\tnodsp\n";
311 MipsTargetStreamer::emitDirectiveSetNoDsp();
312 }
313
emitDirectiveSetPop()314 void MipsTargetAsmStreamer::emitDirectiveSetPop() {
315 OS << "\t.set\tpop\n";
316 MipsTargetStreamer::emitDirectiveSetPop();
317 }
318
emitDirectiveSetPush()319 void MipsTargetAsmStreamer::emitDirectiveSetPush() {
320 OS << "\t.set\tpush\n";
321 MipsTargetStreamer::emitDirectiveSetPush();
322 }
323
emitDirectiveSetSoftFloat()324 void MipsTargetAsmStreamer::emitDirectiveSetSoftFloat() {
325 OS << "\t.set\tsoftfloat\n";
326 MipsTargetStreamer::emitDirectiveSetSoftFloat();
327 }
328
emitDirectiveSetHardFloat()329 void MipsTargetAsmStreamer::emitDirectiveSetHardFloat() {
330 OS << "\t.set\thardfloat\n";
331 MipsTargetStreamer::emitDirectiveSetHardFloat();
332 }
333
334 // Print a 32 bit hex number with all numbers.
printHex32(unsigned Value,raw_ostream & OS)335 static void printHex32(unsigned Value, raw_ostream &OS) {
336 OS << "0x";
337 for (int i = 7; i >= 0; i--)
338 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
339 }
340
emitMask(unsigned CPUBitmask,int CPUTopSavedRegOff)341 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
342 int CPUTopSavedRegOff) {
343 OS << "\t.mask \t";
344 printHex32(CPUBitmask, OS);
345 OS << ',' << CPUTopSavedRegOff << '\n';
346 }
347
emitFMask(unsigned FPUBitmask,int FPUTopSavedRegOff)348 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
349 int FPUTopSavedRegOff) {
350 OS << "\t.fmask\t";
351 printHex32(FPUBitmask, OS);
352 OS << "," << FPUTopSavedRegOff << '\n';
353 }
354
emitDirectiveCpLoad(unsigned RegNo)355 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
356 OS << "\t.cpload\t$"
357 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
358 forbidModuleDirective();
359 }
360
emitDirectiveCpsetup(unsigned RegNo,int RegOrOffset,const MCSymbol & Sym,bool IsReg)361 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
362 int RegOrOffset,
363 const MCSymbol &Sym,
364 bool IsReg) {
365 OS << "\t.cpsetup\t$"
366 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
367
368 if (IsReg)
369 OS << "$"
370 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
371 else
372 OS << RegOrOffset;
373
374 OS << ", ";
375
376 OS << Sym.getName() << "\n";
377 forbidModuleDirective();
378 }
379
emitDirectiveModuleFP()380 void MipsTargetAsmStreamer::emitDirectiveModuleFP() {
381 OS << "\t.module\tfp=";
382 OS << ABIFlagsSection.getFpABIString(ABIFlagsSection.getFpABI()) << "\n";
383 }
384
emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value)385 void MipsTargetAsmStreamer::emitDirectiveSetFp(
386 MipsABIFlagsSection::FpABIKind Value) {
387 MipsTargetStreamer::emitDirectiveSetFp(Value);
388
389 OS << "\t.set\tfp=";
390 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
391 }
392
emitDirectiveModuleOddSPReg()393 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg() {
394 MipsTargetStreamer::emitDirectiveModuleOddSPReg();
395
396 OS << "\t.module\t" << (ABIFlagsSection.OddSPReg ? "" : "no") << "oddspreg\n";
397 }
398
emitDirectiveSetOddSPReg()399 void MipsTargetAsmStreamer::emitDirectiveSetOddSPReg() {
400 MipsTargetStreamer::emitDirectiveSetOddSPReg();
401 OS << "\t.set\toddspreg\n";
402 }
403
emitDirectiveSetNoOddSPReg()404 void MipsTargetAsmStreamer::emitDirectiveSetNoOddSPReg() {
405 MipsTargetStreamer::emitDirectiveSetNoOddSPReg();
406 OS << "\t.set\tnooddspreg\n";
407 }
408
emitDirectiveModuleSoftFloat()409 void MipsTargetAsmStreamer::emitDirectiveModuleSoftFloat() {
410 OS << "\t.module\tsoftfloat\n";
411 }
412
emitDirectiveModuleHardFloat()413 void MipsTargetAsmStreamer::emitDirectiveModuleHardFloat() {
414 OS << "\t.module\thardfloat\n";
415 }
416
417 // This part is for ELF object output.
MipsTargetELFStreamer(MCStreamer & S,const MCSubtargetInfo & STI)418 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
419 const MCSubtargetInfo &STI)
420 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
421 MCAssembler &MCA = getStreamer().getAssembler();
422 Pic = MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_;
423
424 const FeatureBitset &Features = STI.getFeatureBits();
425
426 // Set the header flags that we can in the constructor.
427 // FIXME: This is a fairly terrible hack. We set the rest
428 // of these in the destructor. The problem here is two-fold:
429 //
430 // a: Some of the eflags can be set/reset by directives.
431 // b: There aren't any usage paths that initialize the ABI
432 // pointer until after we initialize either an assembler
433 // or the target machine.
434 // We can fix this by making the target streamer construct
435 // the ABI, but this is fraught with wide ranging dependency
436 // issues as well.
437 unsigned EFlags = MCA.getELFHeaderEFlags();
438
439 // Architecture
440 if (Features[Mips::FeatureMips64r6])
441 EFlags |= ELF::EF_MIPS_ARCH_64R6;
442 else if (Features[Mips::FeatureMips64r2] ||
443 Features[Mips::FeatureMips64r3] ||
444 Features[Mips::FeatureMips64r5])
445 EFlags |= ELF::EF_MIPS_ARCH_64R2;
446 else if (Features[Mips::FeatureMips64])
447 EFlags |= ELF::EF_MIPS_ARCH_64;
448 else if (Features[Mips::FeatureMips5])
449 EFlags |= ELF::EF_MIPS_ARCH_5;
450 else if (Features[Mips::FeatureMips4])
451 EFlags |= ELF::EF_MIPS_ARCH_4;
452 else if (Features[Mips::FeatureMips3])
453 EFlags |= ELF::EF_MIPS_ARCH_3;
454 else if (Features[Mips::FeatureMips32r6])
455 EFlags |= ELF::EF_MIPS_ARCH_32R6;
456 else if (Features[Mips::FeatureMips32r2] ||
457 Features[Mips::FeatureMips32r3] ||
458 Features[Mips::FeatureMips32r5])
459 EFlags |= ELF::EF_MIPS_ARCH_32R2;
460 else if (Features[Mips::FeatureMips32])
461 EFlags |= ELF::EF_MIPS_ARCH_32;
462 else if (Features[Mips::FeatureMips2])
463 EFlags |= ELF::EF_MIPS_ARCH_2;
464 else
465 EFlags |= ELF::EF_MIPS_ARCH_1;
466
467 // Other options.
468 if (Features[Mips::FeatureNaN2008])
469 EFlags |= ELF::EF_MIPS_NAN2008;
470
471 // -mabicalls and -mplt are not implemented but we should act as if they were
472 // given.
473 EFlags |= ELF::EF_MIPS_CPIC;
474
475 MCA.setELFHeaderEFlags(EFlags);
476 }
477
emitLabel(MCSymbol * S)478 void MipsTargetELFStreamer::emitLabel(MCSymbol *S) {
479 auto *Symbol = cast<MCSymbolELF>(S);
480 if (!isMicroMipsEnabled())
481 return;
482 getStreamer().getAssembler().registerSymbol(*Symbol);
483 uint8_t Type = Symbol->getType();
484 if (Type != ELF::STT_FUNC)
485 return;
486
487 Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
488 }
489
finish()490 void MipsTargetELFStreamer::finish() {
491 MCAssembler &MCA = getStreamer().getAssembler();
492 const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
493
494 // .bss, .text and .data are always at least 16-byte aligned.
495 MCSection &TextSection = *OFI.getTextSection();
496 MCA.registerSection(TextSection);
497 MCSection &DataSection = *OFI.getDataSection();
498 MCA.registerSection(DataSection);
499 MCSection &BSSSection = *OFI.getBSSSection();
500 MCA.registerSection(BSSSection);
501
502 TextSection.setAlignment(std::max(16u, TextSection.getAlignment()));
503 DataSection.setAlignment(std::max(16u, DataSection.getAlignment()));
504 BSSSection.setAlignment(std::max(16u, BSSSection.getAlignment()));
505
506 const FeatureBitset &Features = STI.getFeatureBits();
507
508 // Update e_header flags. See the FIXME and comment above in
509 // the constructor for a full rundown on this.
510 unsigned EFlags = MCA.getELFHeaderEFlags();
511
512 // ABI
513 // N64 does not require any ABI bits.
514 if (getABI().IsO32())
515 EFlags |= ELF::EF_MIPS_ABI_O32;
516 else if (getABI().IsN32())
517 EFlags |= ELF::EF_MIPS_ABI2;
518
519 if (Features[Mips::FeatureGP64Bit]) {
520 if (getABI().IsO32())
521 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
522 } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
523 EFlags |= ELF::EF_MIPS_32BITMODE;
524
525 // If we've set the cpic eflag and we're n64, go ahead and set the pic
526 // one as well.
527 if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64())
528 EFlags |= ELF::EF_MIPS_PIC;
529
530 MCA.setELFHeaderEFlags(EFlags);
531
532 // Emit all the option records.
533 // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
534 // .reginfo.
535 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
536 MEF.EmitMipsOptionRecords();
537
538 emitMipsAbiFlags();
539 }
540
emitAssignment(MCSymbol * S,const MCExpr * Value)541 void MipsTargetELFStreamer::emitAssignment(MCSymbol *S, const MCExpr *Value) {
542 auto *Symbol = cast<MCSymbolELF>(S);
543 // If on rhs is micromips symbol then mark Symbol as microMips.
544 if (Value->getKind() != MCExpr::SymbolRef)
545 return;
546 const auto &RhsSym = cast<MCSymbolELF>(
547 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol());
548
549 if (!(RhsSym.getOther() & ELF::STO_MIPS_MICROMIPS))
550 return;
551
552 Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
553 }
554
getStreamer()555 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
556 return static_cast<MCELFStreamer &>(Streamer);
557 }
558
emitDirectiveSetMicroMips()559 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
560 MicroMipsEnabled = true;
561
562 MCAssembler &MCA = getStreamer().getAssembler();
563 unsigned Flags = MCA.getELFHeaderEFlags();
564 Flags |= ELF::EF_MIPS_MICROMIPS;
565 MCA.setELFHeaderEFlags(Flags);
566 forbidModuleDirective();
567 }
568
emitDirectiveSetNoMicroMips()569 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
570 MicroMipsEnabled = false;
571 forbidModuleDirective();
572 }
573
emitDirectiveSetMips16()574 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
575 MCAssembler &MCA = getStreamer().getAssembler();
576 unsigned Flags = MCA.getELFHeaderEFlags();
577 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
578 MCA.setELFHeaderEFlags(Flags);
579 forbidModuleDirective();
580 }
581
emitDirectiveSetNoReorder()582 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
583 MCAssembler &MCA = getStreamer().getAssembler();
584 unsigned Flags = MCA.getELFHeaderEFlags();
585 Flags |= ELF::EF_MIPS_NOREORDER;
586 MCA.setELFHeaderEFlags(Flags);
587 forbidModuleDirective();
588 }
589
emitDirectiveEnd(StringRef Name)590 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
591 MCAssembler &MCA = getStreamer().getAssembler();
592 MCContext &Context = MCA.getContext();
593 MCStreamer &OS = getStreamer();
594
595 MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS,
596 ELF::SHF_ALLOC | ELF::SHT_REL);
597
598 const MCSymbolRefExpr *ExprRef =
599 MCSymbolRefExpr::create(Name, MCSymbolRefExpr::VK_None, Context);
600
601 MCA.registerSection(*Sec);
602 Sec->setAlignment(4);
603
604 OS.PushSection();
605
606 OS.SwitchSection(Sec);
607
608 OS.EmitValueImpl(ExprRef, 4);
609
610 OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
611 OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4); // reg_offset
612
613 OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
614 OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4); // fpreg_offset
615
616 OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
617 OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4); // frame_reg
618 OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg
619
620 // The .end directive marks the end of a procedure. Invalidate
621 // the information gathered up until this point.
622 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
623
624 OS.PopSection();
625 }
626
emitDirectiveEnt(const MCSymbol & Symbol)627 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
628 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
629 }
630
emitDirectiveAbiCalls()631 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
632 MCAssembler &MCA = getStreamer().getAssembler();
633 unsigned Flags = MCA.getELFHeaderEFlags();
634 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
635 MCA.setELFHeaderEFlags(Flags);
636 }
637
emitDirectiveNaN2008()638 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
639 MCAssembler &MCA = getStreamer().getAssembler();
640 unsigned Flags = MCA.getELFHeaderEFlags();
641 Flags |= ELF::EF_MIPS_NAN2008;
642 MCA.setELFHeaderEFlags(Flags);
643 }
644
emitDirectiveNaNLegacy()645 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
646 MCAssembler &MCA = getStreamer().getAssembler();
647 unsigned Flags = MCA.getELFHeaderEFlags();
648 Flags &= ~ELF::EF_MIPS_NAN2008;
649 MCA.setELFHeaderEFlags(Flags);
650 }
651
emitDirectiveOptionPic0()652 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
653 MCAssembler &MCA = getStreamer().getAssembler();
654 unsigned Flags = MCA.getELFHeaderEFlags();
655 // This option overrides other PIC options like -KPIC.
656 Pic = false;
657 Flags &= ~ELF::EF_MIPS_PIC;
658 MCA.setELFHeaderEFlags(Flags);
659 }
660
emitDirectiveOptionPic2()661 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
662 MCAssembler &MCA = getStreamer().getAssembler();
663 unsigned Flags = MCA.getELFHeaderEFlags();
664 Pic = true;
665 // NOTE: We are following the GAS behaviour here which means the directive
666 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
667 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
668 // EF_MIPS_CPIC to be mutually exclusive.
669 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
670 MCA.setELFHeaderEFlags(Flags);
671 }
672
emitDirectiveInsn()673 void MipsTargetELFStreamer::emitDirectiveInsn() {
674 MipsTargetStreamer::emitDirectiveInsn();
675 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
676 MEF.createPendingLabelRelocs();
677 }
678
emitFrame(unsigned StackReg,unsigned StackSize,unsigned ReturnReg_)679 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
680 unsigned ReturnReg_) {
681 MCContext &Context = getStreamer().getAssembler().getContext();
682 const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
683
684 FrameInfoSet = true;
685 FrameReg = RegInfo->getEncodingValue(StackReg);
686 FrameOffset = StackSize;
687 ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
688 }
689
emitMask(unsigned CPUBitmask,int CPUTopSavedRegOff)690 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
691 int CPUTopSavedRegOff) {
692 GPRInfoSet = true;
693 GPRBitMask = CPUBitmask;
694 GPROffset = CPUTopSavedRegOff;
695 }
696
emitFMask(unsigned FPUBitmask,int FPUTopSavedRegOff)697 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
698 int FPUTopSavedRegOff) {
699 FPRInfoSet = true;
700 FPRBitMask = FPUBitmask;
701 FPROffset = FPUTopSavedRegOff;
702 }
703
emitDirectiveCpLoad(unsigned RegNo)704 void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
705 // .cpload $reg
706 // This directive expands to:
707 // lui $gp, %hi(_gp_disp)
708 // addui $gp, $gp, %lo(_gp_disp)
709 // addu $gp, $gp, $reg
710 // when support for position independent code is enabled.
711 if (!Pic || (getABI().IsN32() || getABI().IsN64()))
712 return;
713
714 // There's a GNU extension controlled by -mno-shared that allows
715 // locally-binding symbols to be accessed using absolute addresses.
716 // This is currently not supported. When supported -mno-shared makes
717 // .cpload expand to:
718 // lui $gp, %hi(__gnu_local_gp)
719 // addiu $gp, $gp, %lo(__gnu_local_gp)
720
721 StringRef SymName("_gp_disp");
722 MCAssembler &MCA = getStreamer().getAssembler();
723 MCSymbol *GP_Disp = MCA.getContext().getOrCreateSymbol(SymName);
724 MCA.registerSymbol(*GP_Disp);
725
726 MCInst TmpInst;
727 TmpInst.setOpcode(Mips::LUi);
728 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
729 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::create(
730 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
731 TmpInst.addOperand(MCOperand::createExpr(HiSym));
732 getStreamer().EmitInstruction(TmpInst, STI);
733
734 TmpInst.clear();
735
736 TmpInst.setOpcode(Mips::ADDiu);
737 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
738 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
739 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::create(
740 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
741 TmpInst.addOperand(MCOperand::createExpr(LoSym));
742 getStreamer().EmitInstruction(TmpInst, STI);
743
744 TmpInst.clear();
745
746 TmpInst.setOpcode(Mips::ADDu);
747 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
748 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
749 TmpInst.addOperand(MCOperand::createReg(RegNo));
750 getStreamer().EmitInstruction(TmpInst, STI);
751
752 forbidModuleDirective();
753 }
754
emitDirectiveCpsetup(unsigned RegNo,int RegOrOffset,const MCSymbol & Sym,bool IsReg)755 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
756 int RegOrOffset,
757 const MCSymbol &Sym,
758 bool IsReg) {
759 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
760 if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
761 return;
762
763 MCAssembler &MCA = getStreamer().getAssembler();
764 MCInst Inst;
765
766 // Either store the old $gp in a register or on the stack
767 if (IsReg) {
768 // move $save, $gpreg
769 Inst.setOpcode(Mips::DADDu);
770 Inst.addOperand(MCOperand::createReg(RegOrOffset));
771 Inst.addOperand(MCOperand::createReg(Mips::GP));
772 Inst.addOperand(MCOperand::createReg(Mips::ZERO));
773 } else {
774 // sd $gpreg, offset($sp)
775 Inst.setOpcode(Mips::SD);
776 Inst.addOperand(MCOperand::createReg(Mips::GP));
777 Inst.addOperand(MCOperand::createReg(Mips::SP));
778 Inst.addOperand(MCOperand::createImm(RegOrOffset));
779 }
780 getStreamer().EmitInstruction(Inst, STI);
781 Inst.clear();
782
783 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::create(
784 &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
785 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::create(
786 &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
787
788 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
789 Inst.setOpcode(Mips::LUi);
790 Inst.addOperand(MCOperand::createReg(Mips::GP));
791 Inst.addOperand(MCOperand::createExpr(HiExpr));
792 getStreamer().EmitInstruction(Inst, STI);
793 Inst.clear();
794
795 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
796 Inst.setOpcode(Mips::ADDiu);
797 Inst.addOperand(MCOperand::createReg(Mips::GP));
798 Inst.addOperand(MCOperand::createReg(Mips::GP));
799 Inst.addOperand(MCOperand::createExpr(LoExpr));
800 getStreamer().EmitInstruction(Inst, STI);
801 Inst.clear();
802
803 // daddu $gp, $gp, $funcreg
804 Inst.setOpcode(Mips::DADDu);
805 Inst.addOperand(MCOperand::createReg(Mips::GP));
806 Inst.addOperand(MCOperand::createReg(Mips::GP));
807 Inst.addOperand(MCOperand::createReg(RegNo));
808 getStreamer().EmitInstruction(Inst, STI);
809
810 forbidModuleDirective();
811 }
812
emitMipsAbiFlags()813 void MipsTargetELFStreamer::emitMipsAbiFlags() {
814 MCAssembler &MCA = getStreamer().getAssembler();
815 MCContext &Context = MCA.getContext();
816 MCStreamer &OS = getStreamer();
817 MCSectionELF *Sec = Context.getELFSection(
818 ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
819 MCA.registerSection(*Sec);
820 Sec->setAlignment(8);
821 OS.SwitchSection(Sec);
822
823 OS << ABIFlagsSection;
824 }
825