| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86Subtarget.cpp | 175 if (In64BitMode || isTargetWin32()) in IsLegalToCallImmediateAddr() 188 if (In64BitMode) { in initSubtargetFeatures() 202 if (In64BitMode) in initSubtargetFeatures() 214 assert((!In64BitMode || HasX86_64) && in initSubtargetFeatures() 222 In64BitMode) in initSubtargetFeatures() 292 In64BitMode(TargetTriple.getArch() == Triple::x86_64), in X86Subtarget()
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| HD | X86InstrVMX.td | 24 Requires<[In64BitMode]>; 31 Requires<[In64BitMode]>; 47 "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>; 49 "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>; 55 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>; 57 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
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| HD | X86InstrMPX.td | 22 Requires<[HasMPX, In64BitMode]>; 33 Requires<[HasMPX, In64BitMode]>; 39 Requires<[HasMPX, In64BitMode]>; 53 Requires<[HasMPX, In64BitMode]>; 63 Requires<[HasMPX, In64BitMode]>;
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| HD | X86Subtarget.h | 237 bool In64BitMode; variable 295 return In64BitMode; in is64Bit() 308 return In64BitMode && (TargetTriple.getEnvironment() == Triple::GNUX32 || in isTarget64BitILP32() 314 return In64BitMode && (TargetTriple.getEnvironment() != Triple::GNUX32 && in isTarget64BitLP64() 426 return In64BitMode && TargetTriple.isOSWindows(); in isTargetWin64() 430 return !In64BitMode && (isTargetCygMing() || isTargetKnownWindowsMSVC()); in isTargetWin32()
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| HD | X86InstrSVM.td | 37 "vmrun\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>; 45 "vmload\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>; 53 "vmsave\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>; 61 "invlpga\t{%ecx, %rax|rax, ecx}", []>, TB, Requires<[In64BitMode]>;
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| HD | X86InstrSystem.td | 54 Requires<[In64BitMode]>; 62 IIC_SYS_ENTER_EXIT>, TB, Requires<[In64BitMode]>; 68 Requires<[In64BitMode]>; 131 Requires<[In64BitMode]>; 138 Requires<[In64BitMode]>; 150 Requires<[In64BitMode]>; 157 Requires<[In64BitMode]>; 301 OpSize32, Requires<[In64BitMode]>; 304 OpSize32, Requires<[In64BitMode]>; 335 OpSize32, Requires<[In64BitMode]>; [all …]
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| HD | X86InstrControl.td | 29 Requires<[In64BitMode]>; 40 Requires<[In64BitMode]>; 47 "{l}ret{|f}q", [], IIC_RET>, Requires<[In64BitMode]>; 53 "{l}ret{|f}q\t$amt", [], IIC_RET>, Requires<[In64BitMode]>; 117 Requires<[In64BitMode]>; 137 [(brind GR64:$dst)], IIC_JMP_REG>, Requires<[In64BitMode]>, 141 Requires<[In64BitMode]>, Sched<[WriteJumpLd]>; 269 Requires<[In64BitMode]>; 273 Requires<[In64BitMode]>; 277 Requires<[In64BitMode,FavorMemIndirectCall]>;
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| HD | X86InstrCompiler.td | 132 Requires<[In64BitMode]>; 184 Requires<[In64BitMode]>; 193 Requires<[In64BitMode]>; 359 Requires<[In64BitMode]>; 362 Requires<[In64BitMode]>; 365 Requires<[In64BitMode]>; 368 Requires<[In64BitMode]>; 391 Requires<[In64BitMode]>; 395 Requires<[In64BitMode]>; 399 Requires<[In64BitMode]>; [all …]
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| HD | X86InstrInfo.td | 803 def In64BitMode : Predicate<"Subtarget->is64Bit()">, 993 Requires<[In64BitMode]>; 1063 IIC_POP_REG>, OpSize32, Requires<[In64BitMode]>; 1065 IIC_POP_REG>, OpSize32, Requires<[In64BitMode]>; 1067 IIC_POP_MEM>, OpSize32, Requires<[In64BitMode]>; 1071 IIC_PUSH_REG>, OpSize32, Requires<[In64BitMode]>; 1073 IIC_PUSH_REG>, OpSize32, Requires<[In64BitMode]>; 1075 IIC_PUSH_MEM>, OpSize32, Requires<[In64BitMode]>; 1082 "push{q}\t$imm", [], IIC_PUSH_IMM>, Requires<[In64BitMode]>; 1085 Requires<[In64BitMode]>; [all …]
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| HD | X86InstrExtension.td | 142 Sched<[WriteALU]>, Requires<[In64BitMode]>; 146 Sched<[WriteALULd]>, Requires<[In64BitMode]>;
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| HD | X86.td | 23 def Mode64Bit : SubtargetFeature<"64bit-mode", "In64BitMode", "true",
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| HD | X86InstrFPStack.td | 640 IIC_FXSAVE>, TB, Requires<[In64BitMode]>; 645 IIC_FXRSTOR>, TB, Requires<[In64BitMode]>;
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| HD | X86InstrFormats.td | 933 : I<o, F, outs, ins, asm, pattern, itin>, PS, Requires<[HasMMX,In64BitMode]>;
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| HD | X86InstrArithmetic.td | 33 OpSize32, Requires<[In64BitMode]>;
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| HD | X86InstrSSE.td | 4665 let Uses = [RDI], Predicates = [HasAVX,In64BitMode] in 4677 let Uses = [RDI], Predicates = [UseSSE2,In64BitMode] in 5848 def : InstAlias<"mwait\t{%rax, %rcx|rcx, rax}", (MWAITrr)>, Requires<[In64BitMode]>; 5853 Requires<[In64BitMode]>;
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| HD | X86InstrAVX512.td | 2585 Requires<[HasAVX512, In64BitMode]>; 2593 Sched<[WriteStore]>, Requires<[HasAVX512, In64BitMode]>;
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| /NextBSD/contrib/llvm/lib/Target/PowerPC/ |
| HD | PPCInstr64Bit.td | 87 [(retflag)]>, Requires<[In64BitMode]>; 91 Requires<[In64BitMode]>; 95 Requires<[In64BitMode]>; 99 Requires<[In64BitMode]>; 102 Requires<[In64BitMode]>; 157 Requires<[In64BitMode]>; 163 Requires<[In64BitMode]>; 167 Requires<[In64BitMode]>; 170 Requires<[In64BitMode]>; 182 Requires<[In64BitMode]>; [all …]
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| HD | PPCInstrVSX.td | 1217 Requires<[In64BitMode]>; 1224 Requires<[In64BitMode]>;
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| HD | PPCInstrInfo.td | 732 def In64BitMode : Predicate<"PPCSubTarget->isPPC64()">;
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| /NextBSD/contrib/llvm/lib/Target/Mips/ |
| HD | MipsInstrFPU.td | 98 // S64 - single precision in 32 64bit fp registers (In64BitMode) 100 // D64 - double precision in 32 64bit fp registers (In64BitMode)
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| /NextBSD/contrib/llvm/include/llvm/Target/ |
| HD | Target.td | 983 /// def : MnemonicAlias<"pushf", "pushfq">, Requires<[In64BitMode]>; 988 /// def : MnemonicAlias<"pushf", "pushfq", "att">, Requires<[In64BitMode]>;
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