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Searched refs:OtherVT (Results 1 – 25 of 28) sorted by relevance

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/NextBSD/contrib/llvm/include/llvm/Target/
HDTargetSelectionDAG.td104 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
152 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
157 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
170 SDTCisVT<5, OtherVT>
174 SDTCisVT<0, OtherVT>
178 SDTCisVT<0, OtherVT>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
182 SDTCisInt<0>, SDTCisVT<1, OtherVT>
263 SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>, SDTCisPtrTy<4>, SDTCisPtrTy<5>
/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZOperands.td452 def brtarget16 : PCRelOperand<OtherVT, PCRel16> {
456 def brtarget32 : PCRelOperand<OtherVT, PCRel32> {
464 def brtarget16tls : PCRelTLSOperand<OtherVT, PCRelTLS16> {
469 def brtarget32tls : PCRelTLSOperand<OtherVT, PCRelTLS32> {
HDSystemZOperators.td24 SDTCisVT<2, OtherVT>]>;
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMicroMipsInstrInfo.td16 def uimm5_lsl2 : Operand<OtherVT> {
132 def jmptarget_mm : Operand<OtherVT> {
140 def brtarget7_mm : Operand<OtherVT> {
147 def brtarget10_mm : Operand<OtherVT> {
154 def brtarget_mm : Operand<OtherVT> {
HDMips32r6InstrInfo.td20 def brtarget21 : Operand<OtherVT> {
27 def brtarget26 : Operand<OtherVT> {
34 def jmpoffset16 : Operand<OtherVT> {
HDMipsInstrFPU.td29 SDTCisVT<2, OtherVT>]>;
HDMipsInstrInfo.td346 def jmptarget : Operand<OtherVT> {
350 def brtarget : Operand<OtherVT> {
HDMipsMSAInstrInfo.td18 SDTCisVT<3, OtherVT>]>;
22 SDTCisVT<3, OtherVT>]>;
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDValueTypes.td22 def OtherVT: ValueType<0 , 0>; // "Other" value
/NextBSD/contrib/llvm/utils/TableGen/
HDCodeGenDAGPatterns.cpp410 MVT OtherVT = Other.TypeVec[i]; in EnforceSmallerThan() local
412 if (OtherVT.isVector() != Smallest.isVector()) in EnforceSmallerThan()
416 if (OtherVT.getScalarSizeInBits() <= Smallest.getScalarSizeInBits() || in EnforceSmallerThan()
417 OtherVT.getSizeInBits() < Smallest.getSizeInBits()) { in EnforceSmallerThan()
437 MVT OtherVT = TypeVec[i]; in EnforceSmallerThan() local
439 if (OtherVT.isVector() != Largest.isVector()) in EnforceSmallerThan()
443 if (OtherVT.getScalarSizeInBits() >= Largest.getScalarSizeInBits() || in EnforceSmallerThan()
444 OtherVT.getSizeInBits() > Largest.getSizeInBits()) { in EnforceSmallerThan()
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDAMDGPUInstrInfo.td233 SDTCisVT<0, OtherVT>
HDAMDGPUInstructions.td63 def brtarget : Operand<OtherVT>;
/NextBSD/contrib/llvm/lib/Target/BPF/
HDBPFInstrInfo.td27 SDTCisVT<3, OtherVT>]>;
46 def brtarget : Operand<OtherVT>;
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonOperands.td526 def brtarget : Operand<OtherVT>;
527 def brtargetExt : Operand<OtherVT> {
/NextBSD/contrib/llvm/lib/Target/Sparc/
HDSparcInstrInfo.td109 // Branch targets have OtherVT type.
110 def brtarget : Operand<OtherVT> {
114 def bprtarget : Operand<OtherVT> {
118 def bprtarget16 : Operand<OtherVT> {
140 SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>;
/NextBSD/contrib/llvm/include/llvm/IR/
HDIntrinsics.td110 : LLVMType<OtherVT>{
150 def llvm_empty_ty : LLVMType<OtherVT>; // { }
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86InstrFPStack.td24 SDTCisVT<2, OtherVT>]>;
27 SDTCisVT<2, OtherVT>]>;
29 SDTCisVT<2, OtherVT>]>;
HDX86InstrInfo.td57 [SDTCisVT<0, OtherVT>,
95 def SDTX86RepStr : SDTypeProfile<0, 1, [SDTCisVT<0, OtherVT>]>;
388 // Branch targets have OtherVT type and print as pc-relative values.
389 def brtarget : Operand<OtherVT>;
390 def brtarget8 : Operand<OtherVT>;
401 // Branch targets have OtherVT type and print as pc-relative values.
405 def brtarget16 : Operand<OtherVT>;
407 def brtarget32 : Operand<OtherVT>;
/NextBSD/contrib/llvm/lib/Target/MSP430/
HDMSP430InstrInfo.td31 def SDT_MSP430BrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>,
84 // Short jump targets have OtherVT type and are printed as pcrel imm values.
85 def jmptarget : Operand<OtherVT> {
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCInstrInfo.td39 SDTCisVT<0, i32>, SDTCisVT<2, OtherVT>
43 SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>
46 SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>
563 def directbrtarget : Operand<OtherVT> {
568 def absdirectbrtarget : Operand<OtherVT> {
577 def condbrtarget : Operand<OtherVT> {
582 def abscondbrtarget : Operand<OtherVT> {
711 def pred : Operand<OtherVT> {
/NextBSD/contrib/llvm/lib/Target/XCore/
HDXCoreInstrInfo.td193 def brtarget : Operand<OtherVT>;
194 def brtarget_neg : Operand<OtherVT> {
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMInstrFormats.td151 def pred : PredicateOperand<OtherVT, (ops i32imm, i32imm),
170 def cc_out : OptionalDefOperand<OtherVT, (ops CCR), (ops (i32 zero_reg))> {
178 def s_cc_out : OptionalDefOperand<OtherVT, (ops CCR), (ops (i32 CPSR))> {
HDARMInstrInfo.td34 [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>;
47 SDTCisVT<5, OtherVT>]>;
396 def brtarget : Operand<OtherVT> {
403 def uncondbrtarget : Operand<OtherVT> {
409 def br_target : Operand<OtherVT> {
951 def ldstm_mode : OptionalDefOperand<OtherVT, (ops i32), (ops (i32 1))> {
HDARMInstrThumb.td112 def t_brtarget : Operand<OtherVT> {
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64InstrFormats.td1018 def am_brcond : Operand<OtherVT> {
1077 def am_tbrcond : Operand<OtherVT> {
1156 def am_b_target : Operand<OtherVT> {
2369 def am_ldrlit : Operand<OtherVT> {

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