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Searched refs:ROR (Results 1 – 15 of 15) sorted by relevance

/NextBSD/crypto/openssl/crypto/sha/asm/
HDsha512-ppc.pl77 $ROR="rotrdi";
89 $ROR="rotrwi";
127 $ROR $a0,$e,$Sigma1[0]
128 $ROR $a1,$e,$Sigma1[1]
133 $ROR $a1,$a1,`$Sigma1[2]-$Sigma1[1]`
140 $ROR $a0,$a,$Sigma0[0]
141 $ROR $a1,$a,$Sigma0[1]
145 $ROR $a1,$a1,`$Sigma0[2]-$Sigma0[1]`
166 $ROR $a0,@X[($i+1)%16],$sigma0[0]
167 $ROR $a1,@X[($i+1)%16],$sigma0[1]
[all …]
/NextBSD/contrib/llvm/lib/Target/AArch64/MCTargetDesc/
HDAArch64AddressingModes.h37 ROR, enumerator
58 case AArch64_AM::ROR: return "ror"; in getShiftExtendName()
79 case 3: return AArch64_AM::ROR; in getShiftType()
107 case AArch64_AM::ROR: STEnc = 3; break; in getShifterImm()
/NextBSD/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/
HDARMUtils.h190 static inline uint32_t ROR(const uint32_t value, const uint32_t amount, bool *success) in ROR() function
/NextBSD/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/
HDEmulateInstructionARM.cpp1236 R[t] = ROR(data, 8*UInt(address<1:0>)); in EmulateLDRRtPCRelative()
5911 R[t] = ROR(data, 8*UInt(address<1:0>)); in EmulateLDRImmediateARM()
6020 data = ROR (data, Bits32 (address, 1, 0), &success); in EmulateLDRImmediateARM()
6052 R[t] = ROR(data, 8*UInt(address<1:0>)); in EmulateLDRRegister()
6228 data = ROR (data, Bits32 (address, 1, 0), &success); in EmulateLDRRegister()
7918 rotated = ROR(R[m], rotation); in EmulateSXTB()
7974 uint64_t rotated = ROR (Rm, rotation, &success); in EmulateSXTB()
8002 rotated = ROR(R[m], rotation); in EmulateSXTH()
8058 uint64_t rotated = ROR (Rm, rotation, &success); in EmulateSXTH()
8086 rotated = ROR(R[m], rotation); in EmulateUXTB()
[all …]
/NextBSD/contrib/llvm/lib/Target/AArch64/Utils/
HDAArch64BaseInfo.h483 ROR, enumerator
/NextBSD/contrib/llvm/lib/Target/AArch64/AsmParser/
HDAArch64AsmParser.cpp960 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || in isShifter()
1029 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && in isLogicalShifter()
2310 .Case("ror", AArch64_AM::ROR) in tryParseOptionalShiftExtend()
2331 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend()
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64ISelDAGToDAG.cpp310 return AArch64_AM::ROR; in getShiftTypeForNode()
333 if (!AllowROR && ShType == AArch64_AM::ROR) in SelectShiftedRegister()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86SchedHaswell.td746 // ROR ROL.
HDX86InstrCompiler.td1546 defm : MaskedShiftAmountPats<rotr, "ROR">;
HDX86InstrInfo.td2913 defm : ShiftRotateByOneAlias<"ror", "ROR">;
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMScheduleSwift.td1187 // ASR,LSL,ROR,RRX
HDARMInstrThumb2.td2307 // (rotr x, (and y, 0x...1f)) ==> (ROR x, y)
HDARMInstrInfo.td5649 // LSR, ROR, and RRX instructions.
/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDDAGCombiner.cpp3676 if (SDValue ROR = ReassociateOps(ISD::OR, SDLoc(N), N0, N1)) in visitOR() local
3677 return ROR; in visitOR()
/NextBSD/contrib/binutils/gas/
HDChangeLog-00015274 Issue a warning is "ROR #0" is used.