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Searched refs:I32_bit (Results 1 – 25 of 129) sorted by relevance

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/netbsd/src/sys/arch/hpcarm/hpcarm/
Dsoftintr.c81 saved_cpsr = SetCPSR(I32_bit, I32_bit); in softintr_disestablish()
85 SetCPSR(I32_bit, I32_bit & saved_cpsr); in softintr_disestablish()
87 SetCPSR(I32_bit, I32_bit & saved_cpsr); in softintr_disestablish()
117 "=r" (saved_cpsr) : "i" (I32_bit) : "r1"); in softintr_schedule()
119 saved_cpsr = SetCPSR(I32_bit, I32_bit); in softintr_schedule()
143 SetCPSR(I32_bit, I32_bit & saved_cpsr); in softintr_schedule()
159 "i" (I32_bit) : "r1"); in softintr_dispatch()
161 saved_cpsr = SetCPSR(I32_bit, I32_bit); in softintr_dispatch()
169 SetCPSR(I32_bit, I32_bit & saved_cpsr); in softintr_dispatch()
182 SetCPSR(I32_bit, I32_bit & saved_cpsr); in softintr_dispatch()
/netbsd/src/sys/arch/arm/include/
Dcpufunc.h303 mask &= (I32_bit | F32_bit); in disable_interrupts()
320 mask &= (I32_bit | F32_bit); in enable_interrupts()
327 case I32_bit | F32_bit: in enable_interrupts()
330 case I32_bit: in enable_interrupts()
350 (__set_cpsr_c((I32_bit | F32_bit), (old_cpsr) & (I32_bit | F32_bit)))
352 #define ENABLE_INTERRUPT() cpsie(I32_bit)
353 #define DISABLE_INTERRUPT() cpsid(I32_bit)
354 #define DISABLE_INTERRUPT_SAVE() cpsid(I32_bit)
367 switch (psw & (I32_bit|F32_bit)) { in cpsie()
368 case I32_bit: __asm("cpsie\ti"); break; in cpsie()
[all …]
Dlocore.h75 orr r0, r0, #(I32_bit) ; \
82 bic r0, r0, #(I32_bit) ; \
114 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
115 #define IRQenable __set_cpsr_c(I32_bit, 0);
124 (((psr) & PSR_MODE) == PSR_USR32_MODE && ((psr) & I32_bit) == 0)
/netbsd/src/sys/arch/arm/sa11x0/
Dsa11x0_irqhandler.c213 saved_cpsr = SetCPSR(I32_bit, I32_bit); in sa11x0_intr_establish()
218 SetCPSR(I32_bit, saved_cpsr & I32_bit); in sa11x0_intr_establish()
255 saved_cpsr = SetCPSR(I32_bit, I32_bit); in sa11x0_intr_disestablish()
259 SetCPSR(I32_bit, saved_cpsr & I32_bit); in sa11x0_intr_disestablish()
/netbsd/src/sys/arch/arm/at91/
Dat91aic.c190 oldirqstate = disable_interrupts(I32_bit); in splx()
208 oldirqstate = disable_interrupts(I32_bit); in _splraise()
275 enable_interrupts(I32_bit); in at91aic_init()
321 oldirqstate = disable_interrupts(I32_bit); in at91aic_intr_establish()
355 oldirqstate = disable_interrupts(I32_bit); in at91aic_intr_disestablish()
392 oldirqstate = enable_interrupts(I32_bit); in intr_process()
429 oldirqstate = disable_interrupts(I32_bit);
448 oldirqstate = disable_interrupts(I32_bit); in at91aic_intr_poll()
454 (void)enable_interrupts(I32_bit); in at91aic_intr_poll()
456 (void)disable_interrupts(I32_bit); in at91aic_intr_poll()
/netbsd/src/sys/arch/arm/s3c2xx0/
Ds3c2xx0_intr.h101 int save = disable_interrupts(I32_bit); in s3c2xx0_mask_interrupts()
110 int save = disable_interrupts(I32_bit); in s3c2xx0_unmask_interrupts()
133 psw = disable_interrupts(I32_bit); in s3c2xx0_splx()
150 psw = disable_interrupts(I32_bit); in s3c2xx0_splraise()
162 int psw = disable_interrupts(I32_bit); in s3c2xx0_spllower()
Ds3c2410_intr.c129 enable_interrupts(I32_bit); /* allow nested interrupts */ in s3c2410_irq_handler()
135 disable_interrupts(I32_bit); in s3c2410_irq_handler()
156 int save = disable_interrupts(I32_bit); in cascade_irq_handler()
178 disable_interrupts(I32_bit); in cascade_irq_handler()
209 save = disable_interrupts(I32_bit); in s3c24x0_intr_establish()
356 save = disable_interrupts(I32_bit); in s3c2410_setup_extint()
Ds3c2440_intr.c159 enable_interrupts(I32_bit); /* allow nested interrupts */ in s3c2440_irq_handler()
165 disable_interrupts(I32_bit); in s3c2440_irq_handler()
186 int save = disable_interrupts(I32_bit); in cascade_irq_handler()
208 disable_interrupts(I32_bit); in cascade_irq_handler()
239 save = disable_interrupts(I32_bit); in s3c24x0_intr_establish()
390 save = disable_interrupts(I32_bit); in s3c2440_setup_extint()
Ds3c2800_intr.c108 enable_interrupts(I32_bit); /* allow nested interrupts */ in s3c2800_irq_handler()
114 disable_interrupts(I32_bit); in s3c2800_irq_handler()
145 save = disable_interrupts(I32_bit); in s3c2800_intr_establish()
/netbsd/src/sys/arch/arm/xscale/
Dpxa2x0_apm_asm.S169 mov r1, #(PSR_FIQ32_MODE | I32_bit | F32_bit)
174 mov r1, #(PSR_IRQ32_MODE | I32_bit | F32_bit)
179 mov r1, #(PSR_ABT32_MODE | I32_bit | F32_bit)
184 mov r1, #(PSR_UND32_MODE | I32_bit | F32_bit)
189 mov r1, #(PSR_SYS32_MODE | I32_bit | F32_bit)
193 mov r1, #(PSR_SVC32_MODE | I32_bit | F32_bit)
214 orr r2, r2, #(I32_bit|F32_bit)
221 and r2, r2, #~(I32_bit|F32_bit)
332 mov r1, #(PSR_FIQ32_MODE | I32_bit | F32_bit)
345 mov r1, #(PSR_IRQ32_MODE | I32_bit | F32_bit)
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Di80321_icu.c257 enable_interrupts(I32_bit); in i80321_intr_init()
292 oldirqstate = disable_interrupts(I32_bit); in i80321_intr_establish()
310 oldirqstate = disable_interrupts(I32_bit); in i80321_intr_disestablish()
403 frame->cf_tf.tf_spsr |= I32_bit; in i80321_intr_dispatch()
426 oldirqstate = enable_interrupts(I32_bit); in i80321_intr_dispatch()
438 frame->cf_tf.tf_spsr &= ~I32_bit; in i80321_intr_dispatch()
Dpxa2x0_intr.c136 enable_interrupts(I32_bit); in pxaintc_attach()
209 int save = disable_interrupts(I32_bit); in stray_interrupt()
228 int psw = disable_interrupts(I32_bit); in pxa2x0_update_intr_masks()
293 psw = disable_interrupts(I32_bit); in pxa2x0_intr_establish()
318 psw = disable_interrupts(I32_bit); in pxa2x0_intr_disestablish()
Dpxa2x0_intr.h81 psw = disable_interrupts(I32_bit); in pxa2x0_splx()
98 psw = disable_interrupts(I32_bit); in pxa2x0_splraise()
110 int psw = disable_interrupts(I32_bit); in pxa2x0_spllower()
Dbecc_icu.c283 enable_interrupts(I32_bit); in becc_intr_init()
307 oldirqstate = disable_interrupts(I32_bit); in becc_intr_establish()
325 oldirqstate = disable_interrupts(I32_bit); in becc_intr_disestablish()
375 oldirqstate = enable_interrupts(I32_bit); in becc_intr_dispatch()
/netbsd/src/sys/arch/evbarm/iq80310/
Diq80310_intr.c263 oldirqstate = disable_interrupts(I32_bit); in iq80310_do_soft()
271 oldirqstate = disable_interrupts(I32_bit); \ in iq80310_do_soft()
313 oldirqstate = disable_interrupts(I32_bit); in _setsoftintr()
350 enable_interrupts(I32_bit); in iq80310_intr_init()
387 oldirqstate = disable_interrupts(I32_bit); in iq80310_intr_establish()
405 oldirqstate = disable_interrupts(I32_bit); in iq80310_intr_disestablish()
459 oldirqstate = enable_interrupts(I32_bit); in iq80310_intr_dispatch()
482 oldirqstate = enable_interrupts(I32_bit); in iq80310_intr_dispatch()
/netbsd/src/sys/arch/arm/ep93xx/
Dep93xx_intr.c203 oldirqstate = disable_interrupts(I32_bit); in splx()
222 oldirqstate = disable_interrupts(I32_bit); in _splraise()
272 enable_interrupts(I32_bit); in ep93xx_intr_init()
309 oldirqstate = disable_interrupts(I32_bit); in ep93xx_intr_establish()
324 oldirqstate = disable_interrupts(I32_bit); in ep93xx_intr_disestablish()
363 oldirqstate = enable_interrupts(I32_bit); in ep93xx_intr_dispatch()
375 oldirqstate = enable_interrupts(I32_bit); in ep93xx_intr_dispatch()
/netbsd/src/sys/arch/evbarm/g42xxeb/
Dobio.c119 int psw = disable_interrupts(I32_bit); /* XXX */ in obio_intr()
158 psw = disable_interrupts(I32_bit); in obio_softint()
169 psw = disable_interrupts(I32_bit); in obio_softint()
320 save = disable_interrupts(I32_bit); in obio_intr_establish()
358 save = disable_interrupts(I32_bit); in obio_intr_disestablish()
390 save = disable_interrupts(I32_bit); in obio_intr_mask()
409 save = disable_interrupts(I32_bit); in obio_intr_unmask()
/netbsd/src/sys/arch/arm/ixp12x0/
Dixp12x0_intr.c260 oldirqstate = disable_interrupts(I32_bit); in splx()
279 oldirqstate = disable_interrupts(I32_bit); in _splraise()
327 enable_interrupts(I32_bit); in ixp12x0_intr_init()
354 oldirqstate = disable_interrupts(I32_bit); in ixp12x0_intr_establish()
369 oldirqstate = disable_interrupts(I32_bit); in ixp12x0_intr_disestablish()
407 oldirqstate = enable_interrupts(I32_bit); in ixp12x0_intr_dispatch()
422 oldirqstate = enable_interrupts(I32_bit); in ixp12x0_intr_dispatch()
/netbsd/src/sys/arch/evbarm/nslu2/
Dnslu2_leds.c84 is = disable_interrupts(I32_bit); in slugled_callout()
97 is = disable_interrupts(I32_bit); in slugled_intr0()
115 is = disable_interrupts(I32_bit); in slugled_intr1()
133 is = disable_interrupts(I32_bit); in slugled_intr2()
157 is = disable_interrupts(I32_bit); in slugled_tmr()
/netbsd/src/sys/arch/arm/iomd/
Diomd_irqhandler.c121 enable_interrupts(I32_bit | F32_bit); in irq_init()
160 oldirqstate = disable_interrupts(I32_bit); in irq_claim()
390 int mask = I32_bit | F32_bit;
415 oldirqstate = disable_interrupts(I32_bit); in disable_irq()
435 oldirqstate = disable_interrupts(I32_bit); in enable_irq()
/netbsd/src/sys/arch/arm/imx/
Dimx23_icoll.c162 cpsie(I32_bit); in imx23_intr_dispatch()
164 cpsid(I32_bit); in imx23_intr_dispatch()
173 cpsie(I32_bit); in imx23_intr_dispatch()
181 cpsid(I32_bit); in imx23_intr_dispatch()
268 if ((psw & I32_bit) == 0) { in icoll_set_priority()
/netbsd/src/sys/arch/evbarm/lubbock/
Dobio.c99 psw = disable_interrupts(I32_bit|F32_bit); in obio_intr()
141 psw = disable_interrupts(I32_bit|F32_bit); in obio_intr()
166 psw = disable_interrupts(I32_bit); in obio_softintr()
177 psw = disable_interrupts(I32_bit); in obio_softintr()
317 psw = disable_interrupts(I32_bit); in obio_intr_establish()
/netbsd/src/sys/arch/arm/arm32/
Dspl.S65 orr r2, r4, #(I32_bit)
85 orr r2, r4, #(I32_bit)
108 orr r2, r4, #(I32_bit)
/netbsd/src/sys/arch/evbarm/ifpga/
Difpga_intr.c245 enable_interrupts(I32_bit); in ifpga_intr_postinit()
269 oldirqstate = disable_interrupts(I32_bit); in ifpga_intr_establish()
287 oldirqstate = disable_interrupts(I32_bit); in ifpga_intr_disestablish()
340 oldirqstate = enable_interrupts(I32_bit); in ifpga_intr_dispatch()
/netbsd/src/sys/arch/arm/footbridge/
Dfootbridge_irqhandler.c203 enable_interrupts(I32_bit); in footbridge_intr_init()
240 oldirqstate = disable_interrupts(I32_bit); in footbridge_intr_claim()
264 oldirqstate = disable_interrupts(I32_bit); in footbridge_intr_disestablish()
321 oldirqstate = enable_interrupts(I32_bit); in footbridge_intr_dispatch()

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