| /NextBSD/contrib/llvm/tools/lldb/source/Plugins/Instruction/MIPS/ |
| HD | EmulateInstructionMIPS.cpp | 632 dst = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_ADDiu() 633 src = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_ADDiu() 667 src = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_SW() 668 base = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_SW() 717 src = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_LW() 718 base = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_LW() 753 rs = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_BEQ() 754 rt = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_BEQ() 796 rs = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_BNE() 797 rt = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_BNE() [all …]
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| /NextBSD/contrib/llvm/tools/lldb/source/Plugins/Instruction/MIPS64/ |
| HD | EmulateInstructionMIPS64.cpp | 635 dst = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_DADDiu() 636 src = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_DADDiu() 670 base = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_SW() 700 base = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_LW() 734 src = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_SD() 735 base = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_SD() 782 src = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_LD() 783 base = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_LD() 820 rs = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); in Emulate_BEQ() 821 rt = m_reg_info->getEncodingValue (insn.getOperand(1).getReg()); in Emulate_BEQ() [all …]
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| /NextBSD/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| HD | ARMMCCodeEmitter.cpp | 534 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue() 564 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues() 873 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() 874 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() 891 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue() 975 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getT2AddrModeImm8s4OpValue() 1012 unsigned Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getT2AddrModeImm0_1020s4OpValue() 1080 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() 1081 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() 1116 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode2OpValue() [all …]
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| HD | ARMELFStreamer.cpp | 1209 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes() 1300 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP() 1319 unsigned Reg = MRI->getEncodingValue(RegList[i]); in emitRegSave()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| HD | R600MCCodeEmitter.cpp | 160 return MRI.getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan() 164 return MRI.getEncodingValue(RegNo) & HW_REG_MASK; in getHWReg() 173 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
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| HD | SIMCCodeEmitter.cpp | 249 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | R600RegisterInfo.cpp | 60 return this->getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan() 64 return GET_REG_INDEX(getEncodingValue(Reg)); in getHWRegIndex()
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| HD | R600ExpandSpecialInstrs.cpp | 203 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction() 230 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 && in runOnMachineFunction() 231 (TRI.getEncodingValue(Src1) & 0xff) < 127) in runOnMachineFunction() 307 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
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| HD | AMDGPUAsmPrinter.cpp | 209 unsigned HWReg = RI->getEncodingValue(MO.getReg()) & 0xff; in EmitProgramInfoR600() 340 unsigned hwReg = RI->getEncodingValue(reg) & 0xff; in getSIProgramInfo()
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| HD | SIInsertWaits.cpp | 238 Result.first = TRI->getEncodingValue(Reg); in getRegInterval()
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| HD | R600InstrInfo.cpp | 363 unsigned Index = RI.getEncodingValue(Reg) & 0xff; in ExtractSrcs() 456 if (Src.first == GET_REG_INDEX(RI.getEncodingValue(AMDGPU::OQAP))) { in isLegalUpTo() 643 unsigned Index = RI.getEncodingValue(Src.first->getReg()) & 0xff; in fitsConstReadLimitations()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/Disassembler/ |
| HD | AArch64ExternalSymbolizer.cpp | 99 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // reg in tryAddingSymbolicOperand() 128 MCRI.getEncodingValue(MI.getOperand(1).getReg()) << 5; // Rn in tryAddingSymbolicOperand() 129 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // Rd in tryAddingSymbolicOperand()
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| /NextBSD/contrib/llvm/lib/Target/BPF/MCTargetDesc/ |
| HD | BPFMCCodeEmitter.cpp | 80 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue() 159 Encoding = MRI.getEncodingValue(Op1.getReg()); in getMemoryOpValue()
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| /NextBSD/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| HD | PPCMCCodeEmitter.cpp | 314 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding() 337 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding() 351 return CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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| /NextBSD/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
| HD | MipsOptionRecord.cpp | 76 unsigned EncVal = MCRegInfo->getEncodingValue(CurrentSubReg); in SetPhysRegUsed()
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| HD | MipsTargetStreamer.cpp | 685 FrameReg = RegInfo->getEncodingValue(StackReg); in emitFrame() 687 ReturnReg = RegInfo->getEncodingValue(ReturnReg_); in emitFrame()
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| HD | MipsMCCodeEmitter.cpp | 629 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue() 940 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue()
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| /NextBSD/contrib/llvm/lib/Target/PowerPC/ |
| HD | PPCRegisterInfo.cpp | 473 .addImm(getEncodingValue(SrcReg) * 4) in lowerCRSpilling() 515 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore() 562 .addImm(getEncodingValue(SrcReg)) in lowerCRBitSpilling() 602 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore()
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| HD | PPCFrameLowering.cpp | 319 unsigned RegNo = TRI->getEncodingValue(I->first); in HandleVRSaveUpdate() 335 unsigned RegNo = TRI->getEncodingValue(MO.getReg()); in HandleVRSaveUpdate() 1325 LowerBound -= (31 - TRI->getEncodingValue(MinFPR) + 1) * 8; in processFunctionBeforeFrameFinalized() 1379 std::min<unsigned>(TRI->getEncodingValue(MinGPR), in processFunctionBeforeFrameFinalized() 1380 TRI->getEncodingValue(MinG8R)); in processFunctionBeforeFrameFinalized()
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| /NextBSD/contrib/llvm/lib/Target/Sparc/MCTargetDesc/ |
| HD | SparcMCCodeEmitter.cpp | 120 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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| /NextBSD/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| HD | X86MCTargetDesc.cpp | 72 unsigned SEH = MRI->getEncodingValue(Reg); in InitLLVM2SEHRegisterMapping()
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| /NextBSD/contrib/llvm/lib/Target/ARM/AsmParser/ |
| HD | ARMAsmParser.cpp | 3431 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 3446 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 3471 if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) in parseRegisterList() 3477 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 3499 if (MRI->getEncodingValue(Reg) < MRI->getEncodingValue(OldReg)) { in parseRegisterList() 3505 if (MRI->getEncodingValue(Reg) == MRI->getEncodingValue(OldReg)) { in parseRegisterList() 3514 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 3517 EReg = MRI->getEncodingValue(++Reg); in parseRegisterList() 5977 unsigned Rt = MRI->getEncodingValue(Reg1); in ParseInstruction() 5978 unsigned Rt2 = MRI->getEncodingValue(Reg2); in ParseInstruction() [all …]
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| /NextBSD/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| HD | SystemZMCCodeEmitter.cpp | 141 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64FrameLowering.cpp | 958 (RegInfo->getEncodingValue(OddReg) + 1 == in determineCalleeSaves() 959 RegInfo->getEncodingValue(EvenReg))) && in determineCalleeSaves()
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| /NextBSD/contrib/llvm/include/llvm/MC/ |
| HD | MCRegisterInfo.h | 418 uint16_t getEncodingValue(unsigned RegNo) const { in getEncodingValue() function
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