xref: /NextBSD/contrib/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (revision 84d351007654069f9643c8e4b4802a7f5f08ee42)
1 //===-- AArch64TargetTransformInfo.h - AArch64 specific TTI -----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file a TargetTransformInfo::Concept conforming object specific to the
11 /// AArch64 target machine. It uses the target's detailed information to
12 /// provide more precise answers to certain TTI queries, while letting the
13 /// target independent and default TTI implementations handle the rest.
14 ///
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
18 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
19 
20 #include "AArch64.h"
21 #include "AArch64TargetMachine.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/CodeGen/BasicTTIImpl.h"
24 #include "llvm/Target/TargetLowering.h"
25 #include <algorithm>
26 
27 namespace llvm {
28 
29 class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
30   typedef BasicTTIImplBase<AArch64TTIImpl> BaseT;
31   typedef TargetTransformInfo TTI;
32   friend BaseT;
33 
34   const AArch64Subtarget *ST;
35   const AArch64TargetLowering *TLI;
36 
37   /// Estimate the overhead of scalarizing an instruction. Insert and Extract
38   /// are set if the result needs to be inserted and/or extracted from vectors.
39   unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
40 
getST()41   const AArch64Subtarget *getST() const { return ST; }
getTLI()42   const AArch64TargetLowering *getTLI() const { return TLI; }
43 
44   enum MemIntrinsicType {
45     VECTOR_LDST_TWO_ELEMENTS,
46     VECTOR_LDST_THREE_ELEMENTS,
47     VECTOR_LDST_FOUR_ELEMENTS
48   };
49 
50 public:
AArch64TTIImpl(const AArch64TargetMachine * TM,Function & F)51   explicit AArch64TTIImpl(const AArch64TargetMachine *TM, Function &F)
52       : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
53         TLI(ST->getTargetLowering()) {}
54 
55   // Provide value semantics. MSVC requires that we spell all of these out.
AArch64TTIImpl(const AArch64TTIImpl & Arg)56   AArch64TTIImpl(const AArch64TTIImpl &Arg)
57       : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
AArch64TTIImpl(AArch64TTIImpl && Arg)58   AArch64TTIImpl(AArch64TTIImpl &&Arg)
59       : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
60         TLI(std::move(Arg.TLI)) {}
61 
62   /// \name Scalar TTI Implementations
63   /// @{
64 
65   using BaseT::getIntImmCost;
66   unsigned getIntImmCost(int64_t Val);
67   unsigned getIntImmCost(const APInt &Imm, Type *Ty);
68   unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
69                          Type *Ty);
70   unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
71                          Type *Ty);
72   TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
73 
74   /// @}
75 
76   /// \name Vector TTI Implementations
77   /// @{
78 
getNumberOfRegisters(bool Vector)79   unsigned getNumberOfRegisters(bool Vector) {
80     if (Vector) {
81       if (ST->hasNEON())
82         return 32;
83       return 0;
84     }
85     return 31;
86   }
87 
getRegisterBitWidth(bool Vector)88   unsigned getRegisterBitWidth(bool Vector) {
89     if (Vector) {
90       if (ST->hasNEON())
91         return 128;
92       return 0;
93     }
94     return 64;
95   }
96 
97   unsigned getMaxInterleaveFactor(unsigned VF);
98 
99   unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
100 
101   unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
102 
103   unsigned getArithmeticInstrCost(
104       unsigned Opcode, Type *Ty,
105       TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
106       TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
107       TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
108       TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
109 
110   unsigned getAddressComputationCost(Type *Ty, bool IsComplex);
111 
112   unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
113 
114   unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
115                            unsigned AddressSpace);
116 
117   unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys);
118 
119   void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP);
120 
121   Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
122                                            Type *ExpectedType);
123 
124   bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
125 
126   unsigned getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
127                                       unsigned Factor,
128                                       ArrayRef<unsigned> Indices,
129                                       unsigned Alignment,
130                                       unsigned AddressSpace);
131   /// @}
132 };
133 
134 } // end namespace llvm
135 
136 #endif
137