1 /*===---- tmmintrin.h - SSSE3 intrinsics -----------------------------------===
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 * THE SOFTWARE.
20 *
21 *===-----------------------------------------------------------------------===
22 */
23
24 #ifndef __TMMINTRIN_H
25 #define __TMMINTRIN_H
26
27 #ifndef __SSSE3__
28 #error "SSSE3 instruction set not enabled"
29 #else
30
31 #include <pmmintrin.h>
32
33 /* Define the default attributes for the functions in this file. */
34 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
35
36 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_abs_pi8(__m64 __a)37 _mm_abs_pi8(__m64 __a)
38 {
39 return (__m64)__builtin_ia32_pabsb((__v8qi)__a);
40 }
41
42 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_abs_epi8(__m128i __a)43 _mm_abs_epi8(__m128i __a)
44 {
45 return (__m128i)__builtin_ia32_pabsb128((__v16qi)__a);
46 }
47
48 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_abs_pi16(__m64 __a)49 _mm_abs_pi16(__m64 __a)
50 {
51 return (__m64)__builtin_ia32_pabsw((__v4hi)__a);
52 }
53
54 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_abs_epi16(__m128i __a)55 _mm_abs_epi16(__m128i __a)
56 {
57 return (__m128i)__builtin_ia32_pabsw128((__v8hi)__a);
58 }
59
60 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_abs_pi32(__m64 __a)61 _mm_abs_pi32(__m64 __a)
62 {
63 return (__m64)__builtin_ia32_pabsd((__v2si)__a);
64 }
65
66 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_abs_epi32(__m128i __a)67 _mm_abs_epi32(__m128i __a)
68 {
69 return (__m128i)__builtin_ia32_pabsd128((__v4si)__a);
70 }
71
72 #define _mm_alignr_epi8(a, b, n) __extension__ ({ \
73 __m128i __a = (a); \
74 __m128i __b = (b); \
75 (__m128i)__builtin_ia32_palignr128((__v16qi)__a, (__v16qi)__b, (n)); })
76
77 #define _mm_alignr_pi8(a, b, n) __extension__ ({ \
78 __m64 __a = (a); \
79 __m64 __b = (b); \
80 (__m64)__builtin_ia32_palignr((__v8qi)__a, (__v8qi)__b, (n)); })
81
82 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hadd_epi16(__m128i __a,__m128i __b)83 _mm_hadd_epi16(__m128i __a, __m128i __b)
84 {
85 return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b);
86 }
87
88 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hadd_epi32(__m128i __a,__m128i __b)89 _mm_hadd_epi32(__m128i __a, __m128i __b)
90 {
91 return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b);
92 }
93
94 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hadd_pi16(__m64 __a,__m64 __b)95 _mm_hadd_pi16(__m64 __a, __m64 __b)
96 {
97 return (__m64)__builtin_ia32_phaddw((__v4hi)__a, (__v4hi)__b);
98 }
99
100 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hadd_pi32(__m64 __a,__m64 __b)101 _mm_hadd_pi32(__m64 __a, __m64 __b)
102 {
103 return (__m64)__builtin_ia32_phaddd((__v2si)__a, (__v2si)__b);
104 }
105
106 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hadds_epi16(__m128i __a,__m128i __b)107 _mm_hadds_epi16(__m128i __a, __m128i __b)
108 {
109 return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b);
110 }
111
112 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hadds_pi16(__m64 __a,__m64 __b)113 _mm_hadds_pi16(__m64 __a, __m64 __b)
114 {
115 return (__m64)__builtin_ia32_phaddsw((__v4hi)__a, (__v4hi)__b);
116 }
117
118 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hsub_epi16(__m128i __a,__m128i __b)119 _mm_hsub_epi16(__m128i __a, __m128i __b)
120 {
121 return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b);
122 }
123
124 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hsub_epi32(__m128i __a,__m128i __b)125 _mm_hsub_epi32(__m128i __a, __m128i __b)
126 {
127 return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b);
128 }
129
130 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hsub_pi16(__m64 __a,__m64 __b)131 _mm_hsub_pi16(__m64 __a, __m64 __b)
132 {
133 return (__m64)__builtin_ia32_phsubw((__v4hi)__a, (__v4hi)__b);
134 }
135
136 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hsub_pi32(__m64 __a,__m64 __b)137 _mm_hsub_pi32(__m64 __a, __m64 __b)
138 {
139 return (__m64)__builtin_ia32_phsubd((__v2si)__a, (__v2si)__b);
140 }
141
142 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hsubs_epi16(__m128i __a,__m128i __b)143 _mm_hsubs_epi16(__m128i __a, __m128i __b)
144 {
145 return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b);
146 }
147
148 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hsubs_pi16(__m64 __a,__m64 __b)149 _mm_hsubs_pi16(__m64 __a, __m64 __b)
150 {
151 return (__m64)__builtin_ia32_phsubsw((__v4hi)__a, (__v4hi)__b);
152 }
153
154 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_maddubs_epi16(__m128i __a,__m128i __b)155 _mm_maddubs_epi16(__m128i __a, __m128i __b)
156 {
157 return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b);
158 }
159
160 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_maddubs_pi16(__m64 __a,__m64 __b)161 _mm_maddubs_pi16(__m64 __a, __m64 __b)
162 {
163 return (__m64)__builtin_ia32_pmaddubsw((__v8qi)__a, (__v8qi)__b);
164 }
165
166 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mulhrs_epi16(__m128i __a,__m128i __b)167 _mm_mulhrs_epi16(__m128i __a, __m128i __b)
168 {
169 return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b);
170 }
171
172 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_mulhrs_pi16(__m64 __a,__m64 __b)173 _mm_mulhrs_pi16(__m64 __a, __m64 __b)
174 {
175 return (__m64)__builtin_ia32_pmulhrsw((__v4hi)__a, (__v4hi)__b);
176 }
177
178 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_shuffle_epi8(__m128i __a,__m128i __b)179 _mm_shuffle_epi8(__m128i __a, __m128i __b)
180 {
181 return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b);
182 }
183
184 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_shuffle_pi8(__m64 __a,__m64 __b)185 _mm_shuffle_pi8(__m64 __a, __m64 __b)
186 {
187 return (__m64)__builtin_ia32_pshufb((__v8qi)__a, (__v8qi)__b);
188 }
189
190 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sign_epi8(__m128i __a,__m128i __b)191 _mm_sign_epi8(__m128i __a, __m128i __b)
192 {
193 return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b);
194 }
195
196 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sign_epi16(__m128i __a,__m128i __b)197 _mm_sign_epi16(__m128i __a, __m128i __b)
198 {
199 return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b);
200 }
201
202 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sign_epi32(__m128i __a,__m128i __b)203 _mm_sign_epi32(__m128i __a, __m128i __b)
204 {
205 return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b);
206 }
207
208 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_sign_pi8(__m64 __a,__m64 __b)209 _mm_sign_pi8(__m64 __a, __m64 __b)
210 {
211 return (__m64)__builtin_ia32_psignb((__v8qi)__a, (__v8qi)__b);
212 }
213
214 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_sign_pi16(__m64 __a,__m64 __b)215 _mm_sign_pi16(__m64 __a, __m64 __b)
216 {
217 return (__m64)__builtin_ia32_psignw((__v4hi)__a, (__v4hi)__b);
218 }
219
220 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_sign_pi32(__m64 __a,__m64 __b)221 _mm_sign_pi32(__m64 __a, __m64 __b)
222 {
223 return (__m64)__builtin_ia32_psignd((__v2si)__a, (__v2si)__b);
224 }
225
226 #undef __DEFAULT_FN_ATTRS
227
228 #endif /* __SSSE3__ */
229
230 #endif /* __TMMINTRIN_H */
231