xref: /NextBSD/sys/arm/cavium/cns11xx/econa_machdep.c (revision c21ffb8d6aca32c9584cfa072f309a5890a21aea)
1 /*-
2  * Copyright (c) 2009 Yohanes Nugroho <yohanes@gmail.com>
3  * Copyright (c) 1994-1998 Mark Brinicombe.
4  * Copyright (c) 1994 Brini.
5  * All rights reserved.
6  *
7  * This code is derived from software written for Brini by Mark Brinicombe
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed by Brini.
20  * 4. The name of the company nor the name of the author may be used to
21  *    endorse or promote products derived from this software without specific
22  *    prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  */
37 
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
40 
41 #include "opt_kstack_pages.h"
42 
43 #define	_ARM32_BUS_DMA_PRIVATE
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/sysproto.h>
47 #include <sys/signalvar.h>
48 #include <sys/imgact.h>
49 #include <sys/kernel.h>
50 #include <sys/ktr.h>
51 #include <sys/linker.h>
52 #include <sys/lock.h>
53 #include <sys/malloc.h>
54 #include <sys/mutex.h>
55 #include <sys/pcpu.h>
56 #include <sys/proc.h>
57 #include <sys/ptrace.h>
58 #include <sys/cons.h>
59 #include <sys/bio.h>
60 #include <sys/bus.h>
61 #include <sys/buf.h>
62 #include <sys/exec.h>
63 #include <sys/kdb.h>
64 #include <sys/msgbuf.h>
65 #include <machine/physmem.h>
66 #include <machine/reg.h>
67 #include <machine/cpu.h>
68 
69 #include <vm/vm.h>
70 #include <vm/pmap.h>
71 #include <vm/vm_object.h>
72 #include <vm/vm_page.h>
73 #include <vm/vm_map.h>
74 #include <machine/devmap.h>
75 #include <machine/vmparam.h>
76 #include <machine/pcb.h>
77 #include <machine/undefined.h>
78 #include <machine/machdep.h>
79 #include <machine/metadata.h>
80 #include <machine/armreg.h>
81 #include <machine/bus.h>
82 #include <sys/reboot.h>
83 #include "econa_reg.h"
84 
85 /* Page table for mapping proc0 zero page */
86 #define	KERNEL_PT_SYS		0
87 #define	KERNEL_PT_KERN		1
88 #define	KERNEL_PT_KERN_NUM	22
89 /* L2 table for mapping after kernel */
90 #define	KERNEL_PT_AFKERNEL	KERNEL_PT_KERN + KERNEL_PT_KERN_NUM
91 #define	KERNEL_PT_AFKERNEL_NUM	5
92 
93 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
94 #define	NUM_KERNEL_PTS	(KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
95 
96 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
97 
98 /* Physical and virtual addresses for some global pages */
99 
100 struct pv_addr systempage;
101 struct pv_addr msgbufpv;
102 struct pv_addr irqstack;
103 struct pv_addr undstack;
104 struct pv_addr abtstack;
105 struct pv_addr kernelstack;
106 
107 /* Static device mappings. */
108 static const struct arm_devmap_entry econa_devmap[] = {
109 	{
110 		/*
111 		 * This maps DDR SDRAM
112 		 */
113 		ECONA_SDRAM_BASE, /*virtual*/
114 		ECONA_SDRAM_BASE, /*physical*/
115 		ECONA_SDRAM_SIZE, /*size*/
116 		VM_PROT_READ|VM_PROT_WRITE,
117 		PTE_DEVICE,
118 	},
119 	/*
120 	 * Map the on-board devices VA == PA so that we can access them
121 	 * with the MMU on or off.
122 	 */
123 	{
124 		/*
125 		 * This maps the interrupt controller, the UART
126 		 * and the timer.
127 		 */
128 		ECONA_IO_BASE, /*virtual*/
129 		ECONA_IO_BASE, /*physical*/
130 		ECONA_IO_SIZE, /*size*/
131 		VM_PROT_READ|VM_PROT_WRITE,
132 		PTE_DEVICE,
133 	},
134 	{
135 		/*
136 		 * OHCI + EHCI
137 		 */
138 		ECONA_OHCI_VBASE, /*virtual*/
139 		ECONA_OHCI_PBASE, /*physical*/
140 		ECONA_USB_SIZE, /*size*/
141 		VM_PROT_READ|VM_PROT_WRITE,
142 		PTE_DEVICE,
143 	},
144 	{
145 		/*
146 		 * CFI
147 		 */
148 		ECONA_CFI_VBASE, /*virtual*/
149 		ECONA_CFI_PBASE, /*physical*/
150 		ECONA_CFI_SIZE,
151 		VM_PROT_READ|VM_PROT_WRITE,
152 		PTE_DEVICE,
153 	},
154 	{
155 		0,
156 		0,
157 		0,
158 		0,
159 		0,
160 	}
161 };
162 
163 
164 void *
initarm(struct arm_boot_params * abp)165 initarm(struct arm_boot_params *abp)
166 {
167 	struct pv_addr  kernel_l1pt;
168 	volatile uint32_t * ddr = (uint32_t *)0x4000000C;
169 	int loop, i;
170 	u_int l1pagetable;
171 	vm_offset_t afterkern;
172 	vm_offset_t freemempos;
173 	vm_offset_t lastaddr;
174 	uint32_t memsize;
175 	int mem_info;
176 
177 	boothowto = RB_VERBOSE;
178 	lastaddr = parse_boot_param(abp);
179 	arm_physmem_kernaddr = abp->abp_physaddr;
180 	set_cpufuncs();
181 	pcpu0_init();
182 
183 	/* Do basic tuning, hz etc */
184       	init_param1();
185 
186 
187 	freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
188 	/* Define a macro to simplify memory allocation */
189 #define	valloc_pages(var, np)                   \
190 	alloc_pages((var).pv_va, (np));         \
191 	(var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
192 
193 #define	alloc_pages(var, np)			\
194 	(var) = freemempos;		\
195 	freemempos += (np * PAGE_SIZE);		\
196 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
197 
198 	while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
199 		freemempos += PAGE_SIZE;
200 	valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
201 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
202 		if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
203 			valloc_pages(kernel_pt_table[loop],
204 			    L2_TABLE_SIZE / PAGE_SIZE);
205 		} else {
206 			kernel_pt_table[loop].pv_va = freemempos -
207 			    (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
208 			    L2_TABLE_SIZE_REAL;
209 			kernel_pt_table[loop].pv_pa =
210 			    kernel_pt_table[loop].pv_va - KERNVIRTADDR +
211 			    abp->abp_physaddr;
212 		}
213 	}
214 	/*
215 	 * Allocate a page for the system page mapped to V0x00000000
216 	 * This page will just contain the system vectors and can be
217 	 * shared by all processes.
218 	 */
219 	valloc_pages(systempage, 1);
220 
221 	/* Allocate stacks for all modes */
222 	valloc_pages(irqstack, IRQ_STACK_SIZE);
223 	valloc_pages(abtstack, ABT_STACK_SIZE);
224 	valloc_pages(undstack, UND_STACK_SIZE);
225 	valloc_pages(kernelstack, kstack_pages);
226 	valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
227 
228 	/*
229 	 * Now we start construction of the L1 page table
230 	 * We start by mapping the L2 page tables into the L1.
231 	 * This means that we can replace L1 mappings later on if necessary
232 	 */
233 	l1pagetable = kernel_l1pt.pv_va;
234 
235 	/* Map the L2 pages tables in the L1 page table */
236 	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
237 	    &kernel_pt_table[KERNEL_PT_SYS]);
238 	for (i = 0; i < KERNEL_PT_KERN_NUM; i++)
239 		pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE,
240 		    &kernel_pt_table[KERNEL_PT_KERN + i]);
241 	pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR,
242 	   (((uint32_t)lastaddr - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1),
243 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
244 	afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE - 1));
245 	for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
246 		pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE,
247 		    &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
248 	}
249 
250 	/* Map the vector page. */
251 	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
252 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
253 
254 
255 	/* Map the stack pages */
256 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
257 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
258 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
259 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
260 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
261 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
262 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
263 	    kstack_pages * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
264 
265 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
266 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
267 	pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa,
268 	    msgbufsize, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
269 
270 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
271 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
272 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
273 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
274 	}
275 
276 	arm_devmap_bootstrap(l1pagetable, econa_devmap);
277 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
278 	setttb(kernel_l1pt.pv_pa);
279 	cpu_tlb_flushID();
280 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
281 	cninit();
282 	mem_info = ((*ddr) >> 4) & 0x3;
283 	memsize = (8<<mem_info)*1024*1024;
284 
285 	/*
286 	 * Pages were allocated during the secondary bootstrap for the
287 	 * stacks for different CPU modes.
288 	 * We must now set the r13 registers in the different CPU modes to
289 	 * point to these stacks.
290 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
291 	 * of the stack memory.
292 	 */
293 	cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
294 
295 	set_stackptrs(0);
296 
297 	/*
298 	 * We must now clean the cache again....
299 	 * Cleaning may be done by reading new data to displace any
300 	 * dirty data in the cache. This will have happened in setttb()
301 	 * but since we are boot strapping the addresses used for the read
302 	 * may have just been remapped and thus the cache could be out
303 	 * of sync. A re-clean after the switch will cure this.
304 	 * After booting there are no gross relocations of the kernel thus
305 	 * this problem will not occur after initarm().
306 	 */
307 	cpu_idcache_wbinv_all();
308 	cpu_setup();
309 
310 	undefined_init();
311 
312 	init_proc0(kernelstack.pv_va);
313 
314 	arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
315 
316 	pmap_curmaxkvaddr = afterkern + L1_S_SIZE * (KERNEL_PT_KERN_NUM - 1);
317 	vm_max_kernel_address = KERNVIRTADDR + 3 * memsize;
318 	pmap_bootstrap(freemempos, &kernel_l1pt);
319 
320 	msgbufp = (void*)msgbufpv.pv_va;
321 	msgbufinit(msgbufp, msgbufsize);
322 
323 	mutex_init();
324 
325 	/*
326 	 * Add the physical ram we have available.
327 	 *
328 	 * Exclude the kernel, and all the things we allocated which immediately
329 	 * follow the kernel, from the VM allocation pool but not from crash
330 	 * dumps.  virtual_avail is a global variable which tracks the kva we've
331 	 * "allocated" while setting up pmaps.
332 	 *
333 	 * Prepare the list of physical memory available to the vm subsystem.
334 	 */
335 	arm_physmem_hardware_region(PHYSADDR, memsize);
336 	arm_physmem_exclude_region(abp->abp_physaddr,
337 	    virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
338 	arm_physmem_init_kernel_globals();
339 
340 	init_param2(physmem);
341 	kdb_init();
342 
343 	return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
344 	    sizeof(struct pcb)));
345 }
346