1 /*-
2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include "opt_platform.h"
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/reboot.h>
36
37 #include <vm/vm.h>
38
39 #include <machine/bus.h>
40 #include <machine/devmap.h>
41 #include <machine/intr.h>
42 #include <machine/machdep.h>
43 #include <machine/platformvar.h>
44
45 #include <arm/arm/mpcore_timervar.h>
46 #include <arm/freescale/imx/imx6_anatopreg.h>
47 #include <arm/freescale/imx/imx6_anatopvar.h>
48 #include <arm/freescale/imx/imx_machdep.h>
49
50 #include <dev/fdt/fdt_common.h>
51 #include <dev/ofw/openfirm.h>
52
53 #include "platform_if.h"
54
55 struct fdt_fixup_entry fdt_fixup_table[] = {
56 { NULL, NULL }
57 };
58
59 static uint32_t gpio1_node;
60
61 #ifndef ARM_INTRNG
62 /*
63 * Work around the linux workaround for imx6 erratum 006687, in which some
64 * ethernet interrupts don't go to the GPC and thus won't wake the system from
65 * Wait mode. We don't use Wait mode (which halts the GIC, leaving only GPC
66 * interrupts able to wake the system), so we don't experience the bug at all.
67 * The linux workaround is to reconfigure GPIO1_6 as the ENET interrupt by
68 * writing magic values to an undocumented IOMUX register, then letting the gpio
69 * interrupt driver notify the ethernet driver. We'll be able to do all that
70 * (even though we don't need to) once the INTRNG project is committed and the
71 * imx_gpio driver becomes an interrupt driver. Until then, this crazy little
72 * workaround watches for requests to map an interrupt 6 with the interrupt
73 * controller node referring to gpio1, and it substitutes the proper ffec
74 * interrupt number.
75 */
76 static int
imx6_decode_fdt(uint32_t iparent,uint32_t * intr,int * interrupt,int * trig,int * pol)77 imx6_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt,
78 int *trig, int *pol)
79 {
80
81 if (fdt32_to_cpu(intr[0]) == 6 &&
82 OF_node_from_xref(iparent) == gpio1_node) {
83 *interrupt = 150;
84 *trig = INTR_TRIGGER_CONFORM;
85 *pol = INTR_POLARITY_CONFORM;
86 return (0);
87 }
88 return (gic_decode_fdt(iparent, intr, interrupt, trig, pol));
89 }
90
91 fdt_pic_decode_t fdt_pic_table[] = {
92 &imx6_decode_fdt,
93 NULL
94 };
95 #endif
96
97 static vm_offset_t
imx6_lastaddr(platform_t plat)98 imx6_lastaddr(platform_t plat)
99 {
100
101 return (arm_devmap_lastaddr());
102 }
103
104 static int
imx6_attach(platform_t plat)105 imx6_attach(platform_t plat)
106 {
107 /* Inform the MPCore timer driver that its clock is variable. */
108 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
109
110 return (0);
111 }
112
113 static void
imx6_late_init(platform_t plat)114 imx6_late_init(platform_t plat)
115 {
116 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004;
117
118 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS);
119
120 /* Cache the gpio1 node handle for imx6_decode_fdt() workaround code. */
121 gpio1_node = OF_node_from_xref(
122 OF_finddevice("/soc/aips-bus@02000000/gpio@0209c000"));
123 }
124
125 /*
126 * Set up static device mappings.
127 *
128 * This attempts to cover the most-used devices with 1MB section mappings, which
129 * is good for performance (uses fewer TLB entries for device access).
130 *
131 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
132 * L2 cache controller. Most of the 1MB range is unused reserved space.
133 *
134 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
135 *
136 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
137 * the memory map. When we get support for graphics it might make sense to
138 * static map some of that area. Be careful with other things in that area such
139 * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory.
140 */
141 static int
imx6_devmap_init(platform_t plat)142 imx6_devmap_init(platform_t plat)
143 {
144 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
145 const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
146 const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
147 const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
148 const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
149 const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
150
151 arm_devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
152 arm_devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
153 arm_devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
154
155 return (0);
156 }
157
158 void
cpu_reset(void)159 cpu_reset(void)
160 {
161 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
162
163 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
164 }
165
166 /*
167 * Determine what flavor of imx6 we're running on.
168 *
169 * This code is based on the way u-boot does it. Information found on the web
170 * indicates that Freescale themselves were the original source of this logic,
171 * including the strange check for number of CPUs in the SCU configuration
172 * register, which is apparently needed on some revisions of the SOLO.
173 *
174 * According to the documentation, there is such a thing as an i.MX6 Dual
175 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a
176 * number or provided any logic to handle it in their detection code.
177 *
178 * Note that the ANALOG_DIGPROG and SCU configuration registers are not
179 * documented in the chip reference manual. (SCU configuration is mentioned,
180 * but not mapped out in detail.) I think the bottom two bits of the scu config
181 * register may be ncpu-1.
182 *
183 * This hasn't been tested yet on a dual[-lite].
184 *
185 * On a solo:
186 * digprog = 0x00610001
187 * hwsoc = 0x00000062
188 * scu config = 0x00000500
189 * On a quad:
190 * digprog = 0x00630002
191 * hwsoc = 0x00000063
192 * scu config = 0x00005503
193 */
imx_soc_type()194 u_int imx_soc_type()
195 {
196 uint32_t digprog, hwsoc;
197 uint32_t *pcr;
198 static u_int soctype;
199 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
200 #define HWSOC_MX6SL 0x60
201 #define HWSOC_MX6DL 0x61
202 #define HWSOC_MX6SOLO 0x62
203 #define HWSOC_MX6Q 0x63
204
205 if (soctype != 0)
206 return (soctype);
207
208 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
209 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
210 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
211
212 if (hwsoc != HWSOC_MX6SL) {
213 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
214 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
215 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
216 /*printf("digprog = 0x%08x\n", digprog);*/
217 if (hwsoc == HWSOC_MX6DL) {
218 pcr = arm_devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
219 if (pcr != NULL) {
220 /*printf("scu config = 0x%08x\n", *pcr);*/
221 if ((*pcr & 0x03) == 0) {
222 hwsoc = HWSOC_MX6SOLO;
223 }
224 }
225 }
226 }
227 /* printf("hwsoc 0x%08x\n", hwsoc); */
228
229 switch (hwsoc) {
230 case HWSOC_MX6SL:
231 soctype = IMXSOC_6SL;
232 break;
233 case HWSOC_MX6SOLO:
234 soctype = IMXSOC_6S;
235 break;
236 case HWSOC_MX6DL:
237 soctype = IMXSOC_6DL;
238 break;
239 case HWSOC_MX6Q :
240 soctype = IMXSOC_6Q;
241 break;
242 default:
243 printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
244 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
245 soctype = IMXSOC_6Q;
246 break;
247 }
248
249 return (soctype);
250 }
251
252 /*
253 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config:
254 * option SOCDEV_PA=0x02000000
255 * option SOCDEV_VA=0x02000000
256 * option EARLY_PRINTF
257 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
258 * makes sense now, but if multiple SOCs do that it will make early_putc another
259 * duplicate symbol to be eliminated on the path to a generic kernel.
260 */
261 #if 0
262 static void
263 imx6_early_putc(int c)
264 {
265 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
266 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040;
267 const uint32_t UART_TXRDY = (1 << 3);
268
269 while ((*UART_STAT_REG & UART_TXRDY) == 0)
270 continue;
271 *UART_TX_REG = c;
272 }
273 early_putc_t *early_putc = imx6_early_putc;
274 #endif
275
276 static platform_method_t imx6_methods[] = {
277 PLATFORMMETHOD(platform_attach, imx6_attach),
278 PLATFORMMETHOD(platform_lastaddr, imx6_lastaddr),
279 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init),
280 PLATFORMMETHOD(platform_late_init, imx6_late_init),
281
282 PLATFORMMETHOD_END,
283 };
284
285 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s");
286 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6d");
287 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q");
288