1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
2
3 /*-
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * RiscBSD kernel project
38 *
39 * machdep.c
40 *
41 * Machine dependant functions for kernel setup
42 *
43 * This file needs a lot of work.
44 *
45 * Created : 17/09/94
46 */
47
48 #include <sys/cdefs.h>
49 __FBSDID("$FreeBSD$");
50
51 #include "opt_kstack_pages.h"
52
53 #define _ARM32_BUS_DMA_PRIVATE
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/imgact.h>
59 #include <sys/kernel.h>
60 #include <sys/ktr.h>
61 #include <sys/linker.h>
62 #include <sys/lock.h>
63 #include <sys/malloc.h>
64 #include <sys/mutex.h>
65 #include <sys/pcpu.h>
66 #include <sys/proc.h>
67 #include <sys/ptrace.h>
68 #include <sys/cons.h>
69 #include <sys/bio.h>
70 #include <sys/bus.h>
71 #include <sys/buf.h>
72 #include <sys/exec.h>
73 #include <sys/kdb.h>
74 #include <sys/msgbuf.h>
75 #include <machine/physmem.h>
76 #include <machine/reg.h>
77 #include <machine/cpu.h>
78
79 #include <vm/vm.h>
80 #include <vm/pmap.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <machine/devmap.h>
85 #include <machine/vmparam.h>
86 #include <machine/pcb.h>
87 #include <machine/undefined.h>
88 #include <machine/machdep.h>
89 #include <machine/metadata.h>
90 #include <machine/armreg.h>
91 #include <machine/bus.h>
92 #include <sys/reboot.h>
93
94 #include <arm/xscale/ixp425/ixp425reg.h>
95 #include <arm/xscale/ixp425/ixp425var.h>
96
97 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
98 #define KERNEL_PT_IO 1
99 #define KERNEL_PT_IO_NUM 3
100 #define KERNEL_PT_BEFOREKERN KERNEL_PT_IO + KERNEL_PT_IO_NUM
101 #define KERNEL_PT_AFKERNEL KERNEL_PT_BEFOREKERN + 1 /* L2 table for mapping after kernel */
102 #define KERNEL_PT_AFKERNEL_NUM 9
103
104 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
105 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
106
107 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
108
109 /* Physical and virtual addresses for some global pages */
110
111 struct pv_addr systempage;
112 struct pv_addr msgbufpv;
113 struct pv_addr irqstack;
114 struct pv_addr undstack;
115 struct pv_addr abtstack;
116 struct pv_addr kernelstack;
117 struct pv_addr minidataclean;
118
119 /* Static device mappings. */
120 static const struct arm_devmap_entry ixp425_devmap[] = {
121 /* Physical/Virtual address for I/O space */
122 { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
123 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
124
125 /* Expansion Bus */
126 { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
127 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
128
129 /* CFI Flash on the Expansion Bus */
130 { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
131 IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
132
133 /* IXP425 PCI Configuration */
134 { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
135 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
136
137 /* SDRAM Controller */
138 { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE,
139 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
140
141 /* PCI Memory Space */
142 { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
143 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
144
145 /* Q-Mgr Memory Space */
146 { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
147 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
148
149 { 0 },
150 };
151
152 /* Static device mappings. */
153 static const struct arm_devmap_entry ixp435_devmap[] = {
154 /* Physical/Virtual address for I/O space */
155 { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
156 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
157
158 { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
159 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
160
161 /* IXP425 PCI Configuration */
162 { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
163 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
164
165 /* DDRII Controller NB: mapped same place as IXP425 */
166 { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE,
167 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
168
169 /* PCI Memory Space */
170 { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
171 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
172
173 /* Q-Mgr Memory Space */
174 { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
175 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
176
177 /* CFI Flash on the Expansion Bus */
178 { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
179 IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
180
181 /* USB1 Memory Space */
182 { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE,
183 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
184 /* USB2 Memory Space */
185 { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE,
186 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
187
188 /* GPS Memory Space */
189 { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE,
190 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
191
192 /* RS485 Memory Space */
193 { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE,
194 VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
195
196 { 0 }
197 };
198
199 extern vm_offset_t xscale_cache_clean_addr;
200
201 void *
initarm(struct arm_boot_params * abp)202 initarm(struct arm_boot_params *abp)
203 {
204 #define next_chunk2(a,b) (((a) + (b)) &~ ((b)-1))
205 #define next_page(a) next_chunk2(a,PAGE_SIZE)
206 struct pv_addr kernel_l1pt;
207 struct pv_addr dpcpu;
208 int loop, i;
209 u_int l1pagetable;
210 vm_offset_t freemempos;
211 vm_offset_t freemem_pt;
212 vm_offset_t afterkern;
213 vm_offset_t freemem_after;
214 vm_offset_t lastaddr;
215 uint32_t memsize;
216
217 /* kernel text starts where we were loaded at boot */
218 #define KERNEL_TEXT_OFF (abp->abp_physaddr - PHYSADDR)
219 #define KERNEL_TEXT_BASE (KERNBASE + KERNEL_TEXT_OFF)
220 #define KERNEL_TEXT_PHYS (PHYSADDR + KERNEL_TEXT_OFF)
221
222 lastaddr = parse_boot_param(abp);
223 arm_physmem_kernaddr = abp->abp_physaddr;
224 set_cpufuncs(); /* NB: sets cputype */
225 pcpu_init(pcpup, 0, sizeof(struct pcpu));
226 PCPU_SET(curthread, &thread0);
227
228 init_static_kenv(NULL, 0);
229
230 /* Do basic tuning, hz etc */
231 init_param1();
232
233 /*
234 * We allocate memory downwards from where we were loaded
235 * by RedBoot; first the L1 page table, then NUM_KERNEL_PTS
236 * entries in the L2 page table. Past that we re-align the
237 * allocation boundary so later data structures (stacks, etc)
238 * can be mapped with different attributes (write-back vs
239 * write-through). Note this leaves a gap for expansion
240 * (or might be repurposed).
241 */
242 freemempos = abp->abp_physaddr;
243
244 /* macros to simplify initial memory allocation */
245 #define alloc_pages(var, np) do { \
246 freemempos -= (np * PAGE_SIZE); \
247 (var) = freemempos; \
248 /* NB: this works because locore maps PA=VA */ \
249 memset((char *)(var), 0, ((np) * PAGE_SIZE)); \
250 } while (0)
251 #define valloc_pages(var, np) do { \
252 alloc_pages((var).pv_pa, (np)); \
253 (var).pv_va = (var).pv_pa + (KERNVIRTADDR - abp->abp_physaddr); \
254 } while (0)
255
256 /* force L1 page table alignment */
257 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
258 freemempos -= PAGE_SIZE;
259 /* allocate contiguous L1 page table */
260 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
261 /* now allocate L2 page tables; they are linked to L1 below */
262 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
263 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
264 valloc_pages(kernel_pt_table[loop],
265 L2_TABLE_SIZE / PAGE_SIZE);
266 } else {
267 kernel_pt_table[loop].pv_pa = freemempos +
268 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
269 L2_TABLE_SIZE_REAL;
270 kernel_pt_table[loop].pv_va =
271 kernel_pt_table[loop].pv_pa +
272 (KERNVIRTADDR - abp->abp_physaddr);
273 }
274 }
275 freemem_pt = freemempos; /* base of allocated pt's */
276
277 /*
278 * Re-align allocation boundary so we can map the area
279 * write-back instead of write-through for the stacks and
280 * related structures allocated below.
281 */
282 freemempos = PHYSADDR + 0x100000;
283 /*
284 * Allocate a page for the system page mapped to V0x00000000
285 * This page will just contain the system vectors and can be
286 * shared by all processes.
287 */
288 valloc_pages(systempage, 1);
289
290 /* Allocate dynamic per-cpu area. */
291 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
292 dpcpu_init((void *)dpcpu.pv_va, 0);
293
294 /* Allocate stacks for all modes */
295 valloc_pages(irqstack, IRQ_STACK_SIZE);
296 valloc_pages(abtstack, ABT_STACK_SIZE);
297 valloc_pages(undstack, UND_STACK_SIZE);
298 valloc_pages(kernelstack, kstack_pages);
299 alloc_pages(minidataclean.pv_pa, 1);
300 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
301
302 /*
303 * Now construct the L1 page table. First map the L2
304 * page tables into the L1 so we can replace L1 mappings
305 * later on if necessary
306 */
307 l1pagetable = kernel_l1pt.pv_va;
308
309 /* Map the L2 pages tables in the L1 page table */
310 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
311 &kernel_pt_table[KERNEL_PT_SYS]);
312 pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
313 &kernel_pt_table[KERNEL_PT_IO]);
314 pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE,
315 &kernel_pt_table[KERNEL_PT_IO + 1]);
316 pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE,
317 &kernel_pt_table[KERNEL_PT_IO + 2]);
318 pmap_link_l2pt(l1pagetable, KERNBASE,
319 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
320 pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 0x100000,
321 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
322 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, PHYSADDR + 0x100000,
323 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
324 pmap_map_chunk(l1pagetable, KERNEL_TEXT_BASE, KERNEL_TEXT_PHYS,
325 next_chunk2(((uint32_t)lastaddr) - KERNEL_TEXT_BASE, L1_S_SIZE),
326 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
327 freemem_after = next_page((int)lastaddr);
328 afterkern = round_page(next_chunk2((vm_offset_t)lastaddr, L1_S_SIZE));
329 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
330 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
331 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
332 }
333 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
334 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
335
336
337 /* Map the Mini-Data cache clean area. */
338 xscale_setup_minidata(l1pagetable, afterkern,
339 minidataclean.pv_pa);
340
341 /* Map the vector page. */
342 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
343 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
344 if (cpu_is_ixp43x())
345 arm_devmap_bootstrap(l1pagetable, ixp435_devmap);
346 else
347 arm_devmap_bootstrap(l1pagetable, ixp425_devmap);
348 /*
349 * Give the XScale global cache clean code an appropriately
350 * sized chunk of unmapped VA space starting at 0xff000000
351 * (our device mappings end before this address).
352 */
353 xscale_cache_clean_addr = 0xff000000U;
354
355 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
356 setttb(kernel_l1pt.pv_pa);
357 cpu_tlb_flushID();
358 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
359
360 /*
361 * Pages were allocated during the secondary bootstrap for the
362 * stacks for different CPU modes.
363 * We must now set the r13 registers in the different CPU modes to
364 * point to these stacks.
365 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
366 * of the stack memory.
367 */
368 set_stackptrs(0);
369
370 /*
371 * We must now clean the cache again....
372 * Cleaning may be done by reading new data to displace any
373 * dirty data in the cache. This will have happened in setttb()
374 * but since we are boot strapping the addresses used for the read
375 * may have just been remapped and thus the cache could be out
376 * of sync. A re-clean after the switch will cure this.
377 * After booting there are no gross relocations of the kernel thus
378 * this problem will not occur after initarm().
379 */
380 cpu_idcache_wbinv_all();
381 cpu_setup();
382
383 /* ready to setup the console (XXX move earlier if possible) */
384 cninit();
385 /*
386 * Fetch the RAM size from the MCU registers. The
387 * expansion bus was mapped above so we can now read 'em.
388 */
389 if (cpu_is_ixp43x())
390 memsize = ixp435_ddram_size();
391 else
392 memsize = ixp425_sdram_size();
393
394 undefined_init();
395
396 init_proc0(kernelstack.pv_va);
397
398 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
399
400 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
401 vm_max_kernel_address = 0xe0000000;
402 pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
403 msgbufp = (void*)msgbufpv.pv_va;
404 msgbufinit(msgbufp, msgbufsize);
405 mutex_init();
406
407 /*
408 * Add the physical ram we have available.
409 *
410 * Exclude the kernel, and all the things we allocated which immediately
411 * follow the kernel, from the VM allocation pool but not from crash
412 * dumps. virtual_avail is a global variable which tracks the kva we've
413 * "allocated" while setting up pmaps.
414 *
415 * Prepare the list of physical memory available to the vm subsystem.
416 */
417 arm_physmem_hardware_region(PHYSADDR, memsize);
418 arm_physmem_exclude_region(freemem_pt, abp->abp_physaddr -
419 freemem_pt, EXFLAG_NOALLOC);
420 arm_physmem_exclude_region(freemempos, abp->abp_physaddr - 0x100000 -
421 freemempos, EXFLAG_NOALLOC);
422 arm_physmem_exclude_region(abp->abp_physaddr,
423 virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
424 arm_physmem_init_kernel_globals();
425
426 init_param2(physmem);
427 kdb_init();
428
429 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
430 sizeof(struct pcb)));
431 #undef next_page
432 #undef next_chunk2
433 }
434