1 /*
2 * Copyright (c) 2014 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com> and was subsequently ported
6 * to FreeBSD by Michael Gmelin <freebsd@grem.de>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in
16 * the documentation and/or other materials provided with the
17 * distribution.
18 * 3. Neither the name of The DragonFly Project nor the names of its
19 * contributors may be used to endorse or promote products derived
20 * from this software without specific, prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
25 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
26 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
28 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
30 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
32 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 */
35
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
38
39 /*
40 * Intel fourth generation mobile cpus integrated I2C device, smbus driver.
41 *
42 * See ig4_reg.h for datasheet reference and notes.
43 */
44
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/module.h>
49 #include <sys/errno.h>
50 #include <sys/lock.h>
51 #include <sys/mutex.h>
52 #include <sys/sx.h>
53 #include <sys/syslog.h>
54 #include <sys/bus.h>
55
56 #include <machine/bus.h>
57 #include <sys/rman.h>
58 #include <machine/resource.h>
59
60 #include <dev/pci/pcivar.h>
61 #include <dev/pci/pcireg.h>
62 #include <dev/smbus/smbconf.h>
63
64 #include "smbus_if.h"
65
66 #include <dev/ichiic/ig4_reg.h>
67 #include <dev/ichiic/ig4_var.h>
68
69 static int ig4iic_pci_detach(device_t dev);
70
71 #define PCI_CHIP_LYNXPT_LP_I2C_1 0x9c618086
72 #define PCI_CHIP_LYNXPT_LP_I2C_2 0x9c628086
73
74 static int
ig4iic_pci_probe(device_t dev)75 ig4iic_pci_probe(device_t dev)
76 {
77 switch(pci_get_devid(dev)) {
78 case PCI_CHIP_LYNXPT_LP_I2C_1:
79 device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-1");
80 break;
81 case PCI_CHIP_LYNXPT_LP_I2C_2:
82 device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-2");
83 break;
84 default:
85 return (ENXIO);
86 }
87 return (BUS_PROBE_DEFAULT);
88 }
89
90 static int
ig4iic_pci_attach(device_t dev)91 ig4iic_pci_attach(device_t dev)
92 {
93 ig4iic_softc_t *sc = device_get_softc(dev);
94 int error;
95
96 bzero(sc, sizeof(*sc));
97
98 mtx_init(&sc->io_lock, "IG4 I/O lock", NULL, MTX_DEF);
99 sx_init(&sc->call_lock, "IG4 call lock");
100
101 sc->dev = dev;
102 sc->regs_rid = PCIR_BAR(0);
103 sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
104 &sc->regs_rid, RF_ACTIVE);
105 if (sc->regs_res == NULL) {
106 device_printf(dev, "unable to map registers\n");
107 ig4iic_pci_detach(dev);
108 return (ENXIO);
109 }
110 sc->intr_rid = 0;
111 if (pci_alloc_msi(dev, &sc->intr_rid)) {
112 device_printf(dev, "Using MSI\n");
113 }
114 sc->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
115 &sc->intr_rid, RF_SHAREABLE | RF_ACTIVE);
116 if (sc->intr_res == NULL) {
117 device_printf(dev, "unable to map interrupt\n");
118 ig4iic_pci_detach(dev);
119 return (ENXIO);
120 }
121 sc->pci_attached = 1;
122
123 error = ig4iic_attach(sc);
124 if (error)
125 ig4iic_pci_detach(dev);
126
127 return (error);
128 }
129
130 static int
ig4iic_pci_detach(device_t dev)131 ig4iic_pci_detach(device_t dev)
132 {
133 ig4iic_softc_t *sc = device_get_softc(dev);
134 int error;
135
136 if (sc->pci_attached) {
137 error = ig4iic_detach(sc);
138 if (error)
139 return (error);
140 sc->pci_attached = 0;
141 }
142
143 if (sc->intr_res) {
144 bus_release_resource(dev, SYS_RES_IRQ,
145 sc->intr_rid, sc->intr_res);
146 sc->intr_res = NULL;
147 }
148 if (sc->intr_rid != 0)
149 pci_release_msi(dev);
150 if (sc->regs_res) {
151 bus_release_resource(dev, SYS_RES_MEMORY,
152 sc->regs_rid, sc->regs_res);
153 sc->regs_res = NULL;
154 }
155 if (mtx_initialized(&sc->io_lock)) {
156 mtx_destroy(&sc->io_lock);
157 sx_destroy(&sc->call_lock);
158 }
159
160 return (0);
161 }
162
163 static device_method_t ig4iic_pci_methods[] = {
164 /* Device interface */
165 DEVMETHOD(device_probe, ig4iic_pci_probe),
166 DEVMETHOD(device_attach, ig4iic_pci_attach),
167 DEVMETHOD(device_detach, ig4iic_pci_detach),
168
169 /* SMBus methods from ig4_smb.c */
170 DEVMETHOD(smbus_callback, ig4iic_smb_callback),
171 DEVMETHOD(smbus_quick, ig4iic_smb_quick),
172 DEVMETHOD(smbus_sendb, ig4iic_smb_sendb),
173 DEVMETHOD(smbus_recvb, ig4iic_smb_recvb),
174 DEVMETHOD(smbus_writeb, ig4iic_smb_writeb),
175 DEVMETHOD(smbus_writew, ig4iic_smb_writew),
176 DEVMETHOD(smbus_readb, ig4iic_smb_readb),
177 DEVMETHOD(smbus_readw, ig4iic_smb_readw),
178 DEVMETHOD(smbus_pcall, ig4iic_smb_pcall),
179 DEVMETHOD(smbus_bwrite, ig4iic_smb_bwrite),
180 DEVMETHOD(smbus_bread, ig4iic_smb_bread),
181 DEVMETHOD(smbus_trans, ig4iic_smb_trans),
182
183 DEVMETHOD_END
184 };
185
186 static driver_t ig4iic_pci_driver = {
187 "ig4iic",
188 ig4iic_pci_methods,
189 sizeof(struct ig4iic_softc)
190 };
191
192 static devclass_t ig4iic_pci_devclass;
193
194 DRIVER_MODULE(ig4iic, pci, ig4iic_pci_driver, ig4iic_pci_devclass, 0, 0);
195 MODULE_DEPEND(ig4iic, pci, 1, 1, 1);
196 MODULE_DEPEND(ig4iic, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
197 MODULE_VERSION(ig4iic, 1);
198