1 /*- 2 * Copyright (c) 2010-2011 Aleksandr Rybalko <ray@ddteam.net> 3 * Copyright (c) 2009-2010 Alexander Egorenkov <egorenar@gmail.com> 4 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _IF_RTVAR_H_ 32 #define _IF_RTVAR_H_ 33 34 #include <sys/param.h> 35 #include <sys/sysctl.h> 36 #include <sys/sockio.h> 37 #include <sys/mbuf.h> 38 #include <sys/kernel.h> 39 #include <sys/socket.h> 40 #include <sys/systm.h> 41 #include <sys/malloc.h> 42 #include <sys/taskqueue.h> 43 #include <sys/module.h> 44 #include <sys/bus.h> 45 #include <sys/endian.h> 46 47 #include <machine/bus.h> 48 #include <machine/resource.h> 49 #include <sys/rman.h> 50 51 #include <net/bpf.h> 52 #include <net/if.h> 53 #include <net/if_arp.h> 54 #include <net/ethernet.h> 55 #include <net/if_dl.h> 56 #include <net/if_media.h> 57 #include <net/if_types.h> 58 59 #include "opt_if_rt.h" 60 61 #define RT_SOFTC_LOCK(sc) mtx_lock(&(sc)->lock) 62 #define RT_SOFTC_UNLOCK(sc) mtx_unlock(&(sc)->lock) 63 #define RT_SOFTC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->lock, MA_OWNED) 64 65 #define RT_SOFTC_TX_RING_LOCK(ring) mtx_lock(&(ring)->lock) 66 #define RT_SOFTC_TX_RING_UNLOCK(ring) mtx_unlock(&(ring)->lock) 67 #define RT_SOFTC_TX_RING_ASSERT_LOCKED(ring) \ 68 mtx_assert(&(ring)->lock, MA_OWNED) 69 70 #define RT_SOFTC_TX_RING_COUNT 4 71 #define RT_SOFTC_RX_RING_COUNT 4 72 73 #ifndef IF_RT_RING_DATA_COUNT 74 #define IF_RT_RING_DATA_COUNT 128 75 #endif 76 77 #define RT_SOFTC_RX_RING_DATA_COUNT IF_RT_RING_DATA_COUNT 78 79 #define RT_SOFTC_MAX_SCATTER 10 80 81 #define RT_SOFTC_TX_RING_DATA_COUNT (IF_RT_RING_DATA_COUNT/4) 82 #define RT_SOFTC_TX_RING_DESC_COUNT \ 83 (RT_SOFTC_TX_RING_DATA_COUNT * RT_SOFTC_MAX_SCATTER) 84 85 #define RT_TXDESC_SDL1_BURST (1 << 15) 86 #define RT_TXDESC_SDL1_LASTSEG (1 << 14) 87 #define RT_TXDESC_SDL0_DDONE (1 << 15) 88 #define RT_TXDESC_SDL0_LASTSEG (1 << 14) 89 struct rt_txdesc 90 { 91 uint32_t sdp0; 92 uint16_t sdl1; 93 uint16_t sdl0; 94 uint32_t sdp1; 95 uint8_t vid; 96 #define TXDSCR_INS_VLAN_TAG 0x80 97 #define TXDSCR_VLAN_PRIO_MASK 0x70 98 #define TXDSCR_VLAN_IDX_MASK 0x0f 99 uint8_t pppoe; 100 #define TXDSCR_USR_DEF_FLD 0x80 101 #define TXDSCR_INS_PPPOE_HDR 0x10 102 #define TXDSCR_PPPOE_SID_MASK 0x0f 103 uint8_t qn; 104 #define TXDSCR_QUEUE_MASK 0x07 105 uint8_t dst; 106 #define TXDSCR_IP_CSUM_GEN 0x80 107 #define TXDSCR_UDP_CSUM_GEN 0x40 108 #define TXDSCR_TCP_CSUM_GEN 0x20 109 #define TXDSCR_DST_PORT_MASK 0x07 110 #define TXDSCR_DST_PORT_CPU 0x00 111 #define TXDSCR_DST_PORT_GDMA1 0x01 112 #define TXDSCR_DST_PORT_GDMA2 0x02 113 #define TXDSCR_DST_PORT_PPE 0x06 114 #define TXDSCR_DST_PORT_DISC 0x07 115 } __packed; 116 117 #define RT_RXDESC_SDL0_DDONE (1 << 15) 118 struct rt_rxdesc 119 { 120 uint32_t sdp0; 121 uint16_t sdl1; 122 uint16_t sdl0; 123 uint32_t sdp1; 124 uint16_t foe; 125 #define RXDSXR_FOE_ENTRY_VALID 0x40 126 #define RXDSXR_FOE_ENTRY_MASK 0x3f 127 uint8_t ai; 128 #define RXDSXR_AI_COU_REASON 0xff 129 #define RXDSXR_AI_PARSER_RSLT_MASK 0xff 130 uint8_t src; 131 #define RXDSXR_SRC_IPFVLD 0x80 132 #define RXDSXR_SRC_L4FVLD 0x40 133 #define RXDSXR_SRC_IP_CSUM_FAIL 0x20 134 #define RXDSXR_SRC_L4_CSUM_FAIL 0x10 135 #define RXDSXR_SRC_AIS 0x08 136 #define RXDSXR_SRC_PORT_MASK 0x07 137 } __packed; 138 139 struct rt_softc_rx_data 140 { 141 bus_dmamap_t dma_map; 142 struct mbuf *m; 143 }; 144 145 struct rt_softc_rx_ring 146 { 147 bus_dma_tag_t desc_dma_tag; 148 bus_dmamap_t desc_dma_map; 149 bus_addr_t desc_phys_addr; 150 struct rt_rxdesc *desc; 151 bus_dma_tag_t data_dma_tag; 152 bus_dmamap_t spare_dma_map; 153 struct rt_softc_rx_data data[RT_SOFTC_RX_RING_DATA_COUNT]; 154 int cur; 155 int qid; 156 }; 157 158 struct rt_softc_tx_data 159 { 160 bus_dmamap_t dma_map; 161 struct mbuf *m; 162 }; 163 164 struct rt_softc_tx_ring 165 { 166 struct mtx lock; 167 bus_dma_tag_t desc_dma_tag; 168 bus_dmamap_t desc_dma_map; 169 bus_addr_t desc_phys_addr; 170 struct rt_txdesc *desc; 171 int desc_queued; 172 int desc_cur; 173 int desc_next; 174 bus_dma_tag_t seg0_dma_tag; 175 bus_dmamap_t seg0_dma_map; 176 bus_addr_t seg0_phys_addr; 177 uint8_t *seg0; 178 bus_dma_tag_t data_dma_tag; 179 struct rt_softc_tx_data data[RT_SOFTC_TX_RING_DATA_COUNT]; 180 int data_queued; 181 int data_cur; 182 int data_next; 183 int qid; 184 }; 185 186 struct rt_softc 187 { 188 device_t dev; 189 struct mtx lock; 190 uint32_t flags; 191 192 int mem_rid; 193 struct resource *mem; 194 int irq_rid; 195 struct resource *irq; 196 void *irqh; 197 198 bus_space_tag_t bst; 199 bus_space_handle_t bsh; 200 201 struct ifnet *ifp; 202 int if_flags; 203 struct ifmedia rt_ifmedia; 204 205 uint32_t mac_rev; 206 uint8_t mac_addr[ETHER_ADDR_LEN]; 207 device_t rt_miibus; 208 209 uint32_t intr_enable_mask; 210 uint32_t intr_disable_mask; 211 uint32_t intr_pending_mask; 212 213 struct task rx_done_task; 214 int rx_process_limit; 215 struct task tx_done_task; 216 struct task periodic_task; 217 struct callout periodic_ch; 218 unsigned long periodic_round; 219 struct taskqueue *taskqueue; 220 221 struct rt_softc_rx_ring rx_ring[RT_SOFTC_RX_RING_COUNT]; 222 struct rt_softc_tx_ring tx_ring[RT_SOFTC_TX_RING_COUNT]; 223 int tx_ring_mgtqid; 224 225 struct callout tx_watchdog_ch; 226 int tx_timer; 227 228 /* statistic counters */ 229 unsigned long interrupts; 230 unsigned long tx_coherent_interrupts; 231 unsigned long rx_coherent_interrupts; 232 unsigned long rx_interrupts[RT_SOFTC_RX_RING_COUNT]; 233 unsigned long rx_delay_interrupts; 234 unsigned long tx_interrupts[RT_SOFTC_TX_RING_COUNT]; 235 unsigned long tx_delay_interrupts; 236 unsigned long tx_data_queue_full[RT_SOFTC_TX_RING_COUNT]; 237 unsigned long tx_watchdog_timeouts; 238 unsigned long tx_defrag_packets; 239 unsigned long no_tx_desc_avail; 240 unsigned long rx_mbuf_alloc_errors; 241 unsigned long rx_mbuf_dmamap_errors; 242 unsigned long tx_queue_not_empty[2]; 243 244 unsigned long rx_bytes; 245 unsigned long rx_packets; 246 unsigned long rx_crc_err; 247 unsigned long rx_phy_err; 248 unsigned long rx_dup_packets; 249 unsigned long rx_fifo_overflows; 250 unsigned long rx_short_err; 251 unsigned long rx_long_err; 252 unsigned long tx_bytes; 253 unsigned long tx_packets; 254 unsigned long tx_skip; 255 unsigned long tx_collision; 256 257 int phy_addr; 258 259 #ifdef IF_RT_DEBUG 260 int debug; 261 #endif 262 263 uint32_t rt_chipid; 264 /* chip specific registers config */ 265 int rx_ring_count; 266 uint32_t int_rx_done_mask; 267 uint32_t int_tx_done_mask; 268 uint32_t delay_int_cfg; 269 uint32_t fe_int_status; 270 uint32_t fe_int_enable; 271 uint32_t pdma_glo_cfg; 272 uint32_t pdma_rst_idx; 273 uint32_t tx_base_ptr[RT_SOFTC_TX_RING_COUNT]; 274 uint32_t tx_max_cnt[RT_SOFTC_TX_RING_COUNT]; 275 uint32_t tx_ctx_idx[RT_SOFTC_TX_RING_COUNT]; 276 uint32_t tx_dtx_idx[RT_SOFTC_TX_RING_COUNT]; 277 uint32_t rx_base_ptr[RT_SOFTC_RX_RING_COUNT]; 278 uint32_t rx_max_cnt[RT_SOFTC_RX_RING_COUNT]; 279 uint32_t rx_calc_idx[RT_SOFTC_RX_RING_COUNT]; 280 uint32_t rx_drx_idx[RT_SOFTC_RX_RING_COUNT]; 281 }; 282 283 #ifdef IF_RT_DEBUG 284 enum 285 { 286 RT_DEBUG_RX = 0x00000001, 287 RT_DEBUG_TX = 0x00000002, 288 RT_DEBUG_INTR = 0x00000004, 289 RT_DEBUG_STATE = 0x00000008, 290 RT_DEBUG_STATS = 0x00000010, 291 RT_DEBUG_PERIODIC = 0x00000020, 292 RT_DEBUG_WATCHDOG = 0x00000040, 293 RT_DEBUG_ANY = 0xffffffff 294 }; 295 296 #define RT_DPRINTF(sc, m, fmt, ...) \ 297 do { if ((sc)->debug & (m)) \ 298 device_printf(sc->dev, fmt, ## __VA_ARGS__); } while (0) 299 #else 300 #define RT_DPRINTF(sc, m, fmt, ...) 301 #endif /* #ifdef IF_RT_DEBUG */ 302 303 #endif /* #ifndef _IF_RTVAR_H_ */ 304