1 /* 2 * Copyright (c) 2014 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #ifndef _BUS_SMBUS_INTELGEN4_IG4_VAR_H_ 36 #define _BUS_SMBUS_INTELGEN4_IG4_VAR_H_ 37 38 #include "bus_if.h" 39 #include "device_if.h" 40 #include "pci_if.h" 41 #include "smbus_if.h" 42 #include "pcidevs.h" 43 44 #define IG4_RBUFSIZE 128 45 #define IG4_RBUFMASK (IG4_RBUFSIZE - 1) 46 47 enum ig4_op { IG4_IDLE, IG4_READ, IG4_WRITE }; 48 49 enum ig4_vers { 50 IG4_HASWELL = 0, 51 IG4_ATOM, /* Bay Trail, Braswell, Cherryview */ 52 IG4_SKYLAKE, /* Skylake-U/Y and Kaby Lake-U/Y */ 53 IG4_APL, 54 IG4_CANNONLAKE 55 }; 56 57 struct ig4iic_softc { 58 device_t dev; 59 device_t smb; 60 device_t acpismb; 61 struct resource *regs_res; 62 int regs_rid; 63 bus_space_tag_t regs_t; 64 bus_space_handle_t regs_h; 65 struct resource *intr_res; 66 int intr_rid; 67 void *intr_handle; 68 int intr_type; 69 enum ig4_vers version; 70 enum ig4_op op; 71 int cmd; 72 int rnext; 73 int rpos; 74 char rbuf[IG4_RBUFSIZE]; 75 uint32_t intr_mask; 76 int error; 77 uint8_t last_slave; 78 int pci_attached : 1; 79 int generic_attached : 1; 80 int use_10bit : 1; 81 int slave_valid : 1; 82 int read_started : 1; 83 int write_started : 1; 84 struct lwkt_serialize slz; 85 }; 86 87 typedef struct ig4iic_softc ig4iic_softc_t; 88 89 /* Attach/Detach called from ig4iic_pci_*() */ 90 int ig4iic_attach(ig4iic_softc_t *sc); 91 int ig4iic_detach(ig4iic_softc_t *sc); 92 93 /* SMBus methods */ 94 extern smbus_callback_t ig4iic_smb_callback; 95 extern smbus_quick_t ig4iic_smb_quick; 96 extern smbus_sendb_t ig4iic_smb_sendb; 97 extern smbus_recvb_t ig4iic_smb_recvb; 98 extern smbus_writeb_t ig4iic_smb_writeb; 99 extern smbus_writew_t ig4iic_smb_writew; 100 extern smbus_readb_t ig4iic_smb_readb; 101 extern smbus_readw_t ig4iic_smb_readw; 102 extern smbus_pcall_t ig4iic_smb_pcall; 103 extern smbus_bwrite_t ig4iic_smb_bwrite; 104 extern smbus_bread_t ig4iic_smb_bread; 105 extern smbus_trans_t ig4iic_smb_trans; 106 107 #endif 108