xref: /dragonfly/sys/dev/drm/i915/intel_atomic.c (revision 3f2dd94a569761201b5b0a18b2f697f97fe1b9dc)
1 /*
2  * Copyright © 2015 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  */
23 
24 /**
25  * DOC: atomic modeset support
26  *
27  * The functions here implement the state management and hardware programming
28  * dispatch required by the atomic modeset infrastructure.
29  * See intel_atomic_plane.c for the plane-specific atomic functionality.
30  */
31 
32 #include <drm/drmP.h>
33 #include <drm/drm_atomic.h>
34 #include <drm/drm_atomic_helper.h>
35 #include <drm/drm_plane_helper.h>
36 #include "intel_drv.h"
37 
38 /**
39  * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
40  * @connector: Connector to get the property for.
41  * @state: Connector state to retrieve the property from.
42  * @property: Property to retrieve.
43  * @val: Return value for the property.
44  *
45  * Returns the atomic property value for a digital connector.
46  */
intel_digital_connector_atomic_get_property(struct drm_connector * connector,const struct drm_connector_state * state,struct drm_property * property,uint64_t * val)47 int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
48                                                             const struct drm_connector_state *state,
49                                                             struct drm_property *property,
50                                                             uint64_t *val)
51 {
52           struct drm_device *dev = connector->dev;
53           struct drm_i915_private *dev_priv = to_i915(dev);
54           struct intel_digital_connector_state *intel_conn_state =
55                     to_intel_digital_connector_state(state);
56 
57           if (property == dev_priv->force_audio_property)
58                     *val = intel_conn_state->force_audio;
59           else if (property == dev_priv->broadcast_rgb_property)
60                     *val = intel_conn_state->broadcast_rgb;
61           else {
62                     DRM_DEBUG_ATOMIC("Unknown property %s\n", property->name);
63                     return -EINVAL;
64           }
65 
66           return 0;
67 }
68 
69 /**
70  * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
71  * @connector: Connector to set the property for.
72  * @state: Connector state to set the property on.
73  * @property: Property to set.
74  * @val: New value for the property.
75  *
76  * Sets the atomic property value for a digital connector.
77  */
intel_digital_connector_atomic_set_property(struct drm_connector * connector,struct drm_connector_state * state,struct drm_property * property,uint64_t val)78 int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
79                                                             struct drm_connector_state *state,
80                                                             struct drm_property *property,
81                                                             uint64_t val)
82 {
83           struct drm_device *dev = connector->dev;
84           struct drm_i915_private *dev_priv = to_i915(dev);
85           struct intel_digital_connector_state *intel_conn_state =
86                     to_intel_digital_connector_state(state);
87 
88           if (property == dev_priv->force_audio_property) {
89                     intel_conn_state->force_audio = val;
90                     return 0;
91           }
92 
93           if (property == dev_priv->broadcast_rgb_property) {
94                     intel_conn_state->broadcast_rgb = val;
95                     return 0;
96           }
97 
98           DRM_DEBUG_ATOMIC("Unknown property %s\n", property->name);
99           return -EINVAL;
100 }
101 
intel_digital_connector_atomic_check(struct drm_connector * conn,struct drm_connector_state * new_state)102 int intel_digital_connector_atomic_check(struct drm_connector *conn,
103                                                    struct drm_connector_state *new_state)
104 {
105           struct intel_digital_connector_state *new_conn_state =
106                     to_intel_digital_connector_state(new_state);
107           struct drm_connector_state *old_state =
108                     drm_atomic_get_old_connector_state(new_state->state, conn);
109           struct intel_digital_connector_state *old_conn_state =
110                     to_intel_digital_connector_state(old_state);
111           struct drm_crtc_state *crtc_state;
112 
113           if (!new_state->crtc)
114                     return 0;
115 
116           crtc_state = drm_atomic_get_new_crtc_state(new_state->state, new_state->crtc);
117 
118           /*
119            * These properties are handled by fastset, and might not end
120            * up in a modeset.
121            */
122           if (new_conn_state->force_audio != old_conn_state->force_audio ||
123               new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
124               new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
125               new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode)
126                     crtc_state->mode_changed = true;
127 
128           return 0;
129 }
130 
131 /**
132  * intel_digital_connector_duplicate_state - duplicate connector state
133  * @connector: digital connector
134  *
135  * Allocates and returns a copy of the connector state (both common and
136  * digital connector specific) for the specified connector.
137  *
138  * Returns: The newly allocated connector state, or NULL on failure.
139  */
140 struct drm_connector_state *
intel_digital_connector_duplicate_state(struct drm_connector * connector)141 intel_digital_connector_duplicate_state(struct drm_connector *connector)
142 {
143           struct intel_digital_connector_state *state;
144 
145           state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
146           if (!state)
147                     return NULL;
148 
149           __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
150           return &state->base;
151 }
152 
153 /**
154  * intel_crtc_duplicate_state - duplicate crtc state
155  * @crtc: drm crtc
156  *
157  * Allocates and returns a copy of the crtc state (both common and
158  * Intel-specific) for the specified crtc.
159  *
160  * Returns: The newly allocated crtc state, or NULL on failure.
161  */
162 struct drm_crtc_state *
intel_crtc_duplicate_state(struct drm_crtc * crtc)163 intel_crtc_duplicate_state(struct drm_crtc *crtc)
164 {
165           struct intel_crtc_state *crtc_state;
166 
167           crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
168           if (!crtc_state)
169                     return NULL;
170 
171           __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
172 
173           crtc_state->update_pipe = false;
174           crtc_state->disable_lp_wm = false;
175           crtc_state->disable_cxsr = false;
176           crtc_state->update_wm_pre = false;
177           crtc_state->update_wm_post = false;
178           crtc_state->fb_changed = false;
179           crtc_state->fifo_changed = false;
180           crtc_state->wm.need_postvbl_update = false;
181           crtc_state->fb_bits = 0;
182 
183           return &crtc_state->base;
184 }
185 
186 /**
187  * intel_crtc_destroy_state - destroy crtc state
188  * @crtc: drm crtc
189  *
190  * Destroys the crtc state (both common and Intel-specific) for the
191  * specified crtc.
192  */
193 void
intel_crtc_destroy_state(struct drm_crtc * crtc,struct drm_crtc_state * state)194 intel_crtc_destroy_state(struct drm_crtc *crtc,
195                                 struct drm_crtc_state *state)
196 {
197           drm_atomic_helper_crtc_destroy_state(crtc, state);
198 }
199 
200 /**
201  * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
202  * @dev_priv: i915 device
203  * @crtc: intel crtc
204  * @crtc_state: incoming crtc_state to validate and setup scalers
205  *
206  * This function sets up scalers based on staged scaling requests for
207  * a @crtc and its planes. It is called from crtc level check path. If request
208  * is a supportable request, it attaches scalers to requested planes and crtc.
209  *
210  * This function takes into account the current scaler(s) in use by any planes
211  * not being part of this atomic state
212  *
213  *  Returns:
214  *         0 - scalers were setup succesfully
215  *         error code - otherwise
216  */
intel_atomic_setup_scalers(struct drm_i915_private * dev_priv,struct intel_crtc * intel_crtc,struct intel_crtc_state * crtc_state)217 int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
218                                      struct intel_crtc *intel_crtc,
219                                      struct intel_crtc_state *crtc_state)
220 {
221           struct drm_plane *plane = NULL;
222           struct intel_plane *intel_plane;
223           struct intel_plane_state *plane_state = NULL;
224           struct intel_crtc_scaler_state *scaler_state =
225                     &crtc_state->scaler_state;
226           struct drm_atomic_state *drm_state = crtc_state->base.state;
227           int num_scalers_need;
228           int i, j;
229 
230           num_scalers_need = hweight32(scaler_state->scaler_users);
231 
232           /*
233            * High level flow:
234            * - staged scaler requests are already in scaler_state->scaler_users
235            * - check whether staged scaling requests can be supported
236            * - add planes using scalers that aren't in current transaction
237            * - assign scalers to requested users
238            * - as part of plane commit, scalers will be committed
239            *   (i.e., either attached or detached) to respective planes in hw
240            * - as part of crtc_commit, scaler will be either attached or detached
241            *   to crtc in hw
242            */
243 
244           /* fail if required scalers > available scalers */
245           if (num_scalers_need > intel_crtc->num_scalers){
246                     DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
247                               num_scalers_need, intel_crtc->num_scalers);
248                     return -EINVAL;
249           }
250 
251           /* walkthrough scaler_users bits and start assigning scalers */
252           for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
253                     int *scaler_id;
254                     const char *name;
255                     int idx;
256 
257                     /* skip if scaler not required */
258                     if (!(scaler_state->scaler_users & (1 << i)))
259                               continue;
260 
261                     if (i == SKL_CRTC_INDEX) {
262                               name = "CRTC";
263                               idx = intel_crtc->base.base.id;
264 
265                               /* panel fitter case: assign as a crtc scaler */
266                               scaler_id = &scaler_state->scaler_id;
267                     } else {
268                               name = "PLANE";
269 
270                               /* plane scaler case: assign as a plane scaler */
271                               /* find the plane that set the bit as scaler_user */
272                               plane = drm_state->planes[i].ptr;
273 
274                               /*
275                                * to enable/disable hq mode, add planes that are using scaler
276                                * into this transaction
277                                */
278                               if (!plane) {
279                                         struct drm_plane_state *state;
280                                         plane = drm_plane_from_index(&dev_priv->drm, i);
281                                         state = drm_atomic_get_plane_state(drm_state, plane);
282                                         if (IS_ERR(state)) {
283                                                   DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
284                                                             plane->base.id);
285                                                   return PTR_ERR(state);
286                                         }
287 
288                                         /*
289                                          * the plane is added after plane checks are run,
290                                          * but since this plane is unchanged just do the
291                                          * minimum required validation.
292                                          */
293                                         crtc_state->base.planes_changed = true;
294                               }
295 
296                               intel_plane = to_intel_plane(plane);
297                               idx = plane->base.id;
298 
299                               /* plane on different crtc cannot be a scaler user of this crtc */
300                               if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) {
301                                         continue;
302                               }
303 
304                               plane_state = intel_atomic_get_existing_plane_state(drm_state,
305                                                                                               intel_plane);
306                               scaler_id = &plane_state->scaler_id;
307                     }
308 
309                     if (*scaler_id < 0) {
310                               /* find a free scaler */
311                               for (j = 0; j < intel_crtc->num_scalers; j++) {
312                                         if (!scaler_state->scalers[j].in_use) {
313                                                   scaler_state->scalers[j].in_use = 1;
314                                                   *scaler_id = j;
315                                                   DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
316                                                             intel_crtc->pipe, *scaler_id, name, idx);
317                                                   break;
318                                         }
319                               }
320                     }
321 
322                     if (WARN_ON(*scaler_id < 0)) {
323                               DRM_DEBUG_KMS("Cannot find scaler for %s:%d\n", name, idx);
324                               continue;
325                     }
326 
327                     /* set scaler mode */
328                     if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
329                               scaler_state->scalers[*scaler_id].mode = 0;
330                     } else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
331                               /*
332                                * when only 1 scaler is in use on either pipe A or B,
333                                * scaler 0 operates in high quality (HQ) mode.
334                                * In this case use scaler 0 to take advantage of HQ mode
335                                */
336                               *scaler_id = 0;
337                               scaler_state->scalers[0].in_use = 1;
338                               scaler_state->scalers[0].mode = PS_SCALER_MODE_HQ;
339                               scaler_state->scalers[1].in_use = 0;
340                     } else {
341                               scaler_state->scalers[*scaler_id].mode = PS_SCALER_MODE_DYN;
342                     }
343           }
344 
345           return 0;
346 }
347 
348 struct drm_atomic_state *
intel_atomic_state_alloc(struct drm_device * dev)349 intel_atomic_state_alloc(struct drm_device *dev)
350 {
351           struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
352 
353           if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
354                     kfree(state);
355                     return NULL;
356           }
357 
358           return &state->base;
359 }
360 
intel_atomic_state_clear(struct drm_atomic_state * s)361 void intel_atomic_state_clear(struct drm_atomic_state *s)
362 {
363           struct intel_atomic_state *state = to_intel_atomic_state(s);
364           drm_atomic_state_default_clear(&state->base);
365           state->dpll_set = state->modeset = false;
366 }
367