1 /*-
2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
3 *
4 * Copyright (c) 2021 - 2023 Intel Corporation
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenFabrics.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #ifndef _ICRDMA_OSDEP_H_
36 #define _ICRDMA_OSDEP_H_
37
38 #include <stdatomic.h>
39 #include <stdbool.h>
40 #include <stdio.h>
41 #include <infiniband/types.h>
42 #include <infiniband/verbs.h>
43 #include <infiniband/udma_barrier.h>
44 #include <sys/bus.h>
45 #include <sys/bus_dma.h>
46 #include <sys/endian.h>
47
48 #define IOMEM
49 #define IRDMA_NTOHL(a) ntohl(a)
50 #define IRDMA_NTOHS(a) ntohs(a)
51 #define MAKEMASK(m, s) ((m) << (s))
52 #define OS_TIMER timer_list
53 #define OS_LIST_HEAD list_head
54 #define OS_LIST_ENTRY list_head
55 #define DECLARE_HASHTABLE(n, b) struct hlist_head (n)[1 << (b)]
56 #define HASH_MIN(v, b) (sizeof(v) <= 4 ? hash_32(v, b) : hash_long(v, b))
57 #define HASH_FOR_EACH_RCU(n, b, o, m) for ((b) = 0, o = NULL; o == NULL && (b) < ARRAY_SIZE(n);\
58 (b)++)\
59 hlist_for_each_entry_rcu(o, &n[(b)], m)
60 #define HASH_FOR_EACH_POSSIBLE_RCU(n, o, m, k) \
61 hlist_for_each_entry_rcu(o, &n[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(n)))],\
62 m)
63 #define HASH_FOR_EACH_POSSIBLE(n, o, m, k) \
64 hlist_for_each_entry(o, &n[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(n)))],\
65 m)
66 #define HASH_ADD_RCU(h, n, k) \
67 hlist_add_head_rcu(n, &h[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(h)))])
68 #define HASH_DEL_RCU(tbl, node) hlist_del_rcu(node)
69 #define HASH_ADD(h, n, k) \
70 hlist_add_head(n, &h[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(h)))])
71 #define HASH_DEL(tbl, node) hlist_del(node)
72
73 #define WQ_UNBOUND_MAX_ACTIVE max_t(int, 512, num_possible_cpus() * 4)
74 #define if_addr_rlock(x)
75 #define if_addr_runlock(x)
76
77 /* constants */
78 #define STATS_TIMER_DELAY 60000
79
80 #define BIT_ULL(a) (1ULL << (a))
81 #define min(a, b) ((a) > (b) ? (b) : (a))
82 #ifndef likely
83 #define likely(x) __builtin_expect((x), 1)
84 #endif
85 #ifndef unlikely
86 #define unlikely(x) __builtin_expect((x), 0)
87 #endif
88
89 #define __aligned_u64 uint64_t __aligned(8)
90
91 #define VLAN_PRIO_SHIFT 13
92 #define IB_USER_VERBS_EX_CMD_MODIFY_QP IB_USER_VERBS_CMD_MODIFY_QP
93
94 /*
95 * debug definition section
96 */
97 #define irdma_print(S, ...) printf("%s:%d "S, __FUNCTION__, __LINE__, ##__VA_ARGS__)
98 #define irdma_debug_buf(dev, mask, desc, buf, size) \
99 do { \
100 u32 i; \
101 if (!((mask) & (dev)->debug_mask)) { \
102 break; \
103 } \
104 irdma_debug(dev, mask, "%s\n", desc); \
105 irdma_debug(dev, mask, "starting address virt=%p phy=%lxh\n", buf, irdma_get_virt_to_phy(buf)); \
106 for (i = 0; i < size ; i += 8) \
107 irdma_debug(dev, mask, "index %03d val: %016lx\n", i, ((unsigned long *)(buf))[i / 8]); \
108 } while(0)
109
110 #define irdma_debug(h, m, s, ...) \
111 do { \
112 if (!(h)) { \
113 if ((m) == IRDMA_DEBUG_INIT) \
114 printf("irdma INIT " s, ##__VA_ARGS__); \
115 } else if (((m) & (h)->debug_mask)) { \
116 printf("irdma " s, ##__VA_ARGS__); \
117 } \
118 } while (0)
119 extern unsigned int irdma_dbg;
120 #define libirdma_debug(fmt, args...) \
121 do { \
122 if (irdma_dbg) \
123 printf("libirdma-%s: " fmt, __func__, ##args); \
124 } while (0)
125 #define irdma_dev_err(ibdev, fmt, ...) \
126 pr_err("%s:%s:%d ERR "fmt, (ibdev)->name, __func__, __LINE__, ##__VA_ARGS__)
127 #define irdma_dev_warn(ibdev, fmt, ...) \
128 pr_warn("%s:%s:%d WARN "fmt, (ibdev)->name, __func__, __LINE__, ##__VA_ARGS__)
129 #define irdma_dev_info(a, b, ...) printf(b, ##__VA_ARGS__)
130 #define irdma_pr_warn printf
131
132 /*
133 * debug definition end
134 */
135
136 typedef __be16 BE16;
137 typedef __be32 BE32;
138 typedef uintptr_t irdma_uintptr;
139
140 struct irdma_hw;
141 struct irdma_pci_f;
142 struct irdma_sc_dev;
143 struct irdma_sc_qp;
144 struct irdma_sc_vsi;
145
146 #define irdma_pr_info(fmt, args ...) printf("%s: WARN "fmt, __func__, ## args)
147 #define irdma_pr_err(fmt, args ...) printf("%s: ERR "fmt, __func__, ## args)
148 #define irdma_memcpy(a, b, c) memcpy((a), (b), (c))
149 #define irdma_memset(a, b, c) memset((a), (b), (c))
150 #define irdma_usec_delay(x) DELAY(x)
151 #define mdelay(x) DELAY((x) * 1000)
152
153 #define rt_tos2priority(tos) (tos >> 5)
154 #define ah_attr_to_dmac(attr) ((attr).dmac)
155 #define kc_typeq_ib_wr const
156 #define kc_ifp_find ip_ifp_find
157 #define kc_ifp6_find ip6_ifp_find
158 #define kc_rdma_gid_attr_network_type(sgid_attr, gid_type, gid) \
159 ib_gid_to_network_type(gid_type, gid)
160 #define irdma_del_timer_compat(tt) del_timer((tt))
161 #define IRDMA_TAILQ_FOREACH CK_STAILQ_FOREACH
162 #define IRDMA_TAILQ_FOREACH_SAFE CK_STAILQ_FOREACH_SAFE
163 #define between(a, b, c) (bool)(c-a >= b-a)
164
db_wr32(__u32 val,__u32 * wqe_word)165 static inline void db_wr32(__u32 val, __u32 *wqe_word)
166 {
167 *wqe_word = val;
168 }
169
170 void *hw_to_dev(struct irdma_hw *hw);
171
172 struct irdma_dma_mem {
173 void *va;
174 u64 pa;
175 bus_dma_tag_t tag;
176 bus_dmamap_t map;
177 bus_dma_segment_t seg;
178 bus_size_t size;
179 int nseg;
180 int flags;
181 };
182
183 struct irdma_virt_mem {
184 void *va;
185 u32 size;
186 };
187
188 #ifndef verbs_mr
189 enum ibv_mr_type {
190 IBV_MR_TYPE_MR,
191 IBV_MR_TYPE_NULL_MR,
192 };
193
194 struct verbs_mr {
195 struct ibv_mr ibv_mr;
196 enum ibv_mr_type mr_type;
197 int access;
198 };
199 #define verbs_get_mr(mr) container_of((mr), struct verbs_mr, ibv_mr)
200 #endif
201 #endif /* _ICRDMA_OSDEP_H_ */
202