1.\"- 2.\" Copyright (c) 2020 Rubicon Communications, LLC (Netgate) 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.Dd January 27, 2021 26.Dt QAT 4 27.Os 28.Sh NAME 29.Nm qat 30.Nd Intel QuickAssist Technology (QAT) driver 31.Sh SYNOPSIS 32To compile this driver into the kernel, 33place the following lines in your 34kernel configuration file: 35.Bd -ragged -offset indent 36.Cd "device crypto" 37.Cd "device cryptodev" 38.Cd "device qat" 39.Ed 40.Pp 41Alternatively, to load the driver as a 42module at boot time, place the following lines in 43.Xr loader.conf 5 : 44.Bd -literal -offset indent 45qat_load="YES" 46qat_c2xxxfw_load="YES" 47qat_c3xxxfw_load="YES" 48qat_c62xfw_load="YES" 49qat_d15xxfw_load="YES" 50qat_dh895xccfw_load="YES" 51.Ed 52.Sh DESCRIPTION 53The 54.Nm 55driver implements 56.Xr crypto 4 57support for some of the cryptographic acceleration functions of the Intel 58QuickAssist (QAT) device. 59The 60.Nm 61driver supports the QAT devices integrated with Atom C2000 and C3000 and Xeon 62C620 and D-1500 platforms, and the Intel QAT Adapter 8950. 63Other platforms and adapters not listed here may also be supported. 64QAT devices are enumerated through PCIe and are thus visible in 65.Xr pciconf 8 66output. 67.Pp 68The 69.Nm 70driver can accelerate AES in CBC, CTR, XTS (except for the C2000) and GCM modes, 71and can perform authenticated encryption combining the CBC, CTR and XTS modes 72with SHA1-HMAC and SHA2-HMAC. 73The 74.Nm 75driver can also compute SHA1 and SHA2 digests. 76The implementation of AES-GCM has a firmware-imposed constraint that the length 77of any additional authenticated data (AAD) must not exceed 240 bytes. 78The driver thus rejects 79.Xr crypto 9 80requests that do not satisfy this constraint. 81.Sh SEE ALSO 82.Xr crypto 4 , 83.Xr ipsec 4 , 84.Xr pci 4 , 85.Xr random 4 , 86.Xr crypto 7 , 87.Xr crypto 9 88.Sh HISTORY 89The 90.Nm 91driver first appeared in 92.Fx 13.0 . 93.Sh AUTHORS 94The 95.Nm 96driver was written for 97.Nx 98by 99.An Hikaru Abe Aq Mt hikaru@iij.ad.jp 100and ported to 101.Fx 102by 103.An Mark Johnston Aq Mt markj@FreeBSD.org . 104.Sh BUGS 105Some Atom C2000 QAT devices have two acceleration engines instead of one. 106The 107.Nm 108driver currently misbehaves when both are enabled and thus does not enable 109the second acceleration engine if one is present. 110