1 /*-
2 * Copyright (c) 2019 Leandro Lupori
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26 #include <sys/cdefs.h>
27 #include <openfirm.h>
28 #include <stand.h>
29
30 #include <sys/endian.h>
31
32 /* #define CAS_DEBUG */
33 #ifdef CAS_DEBUG
34 #define DPRINTF(fmt, ...) printf(fmt, ## __VA_ARGS__)
35 #else
36 #define DPRINTF(fmt, ...) do { ; } while (0)
37 #endif
38
39 /* PVR */
40 #define PVR_CPU_P8E 0x004b0000
41 #define PVR_CPU_P8NVL 0x004c0000
42 #define PVR_CPU_P8 0x004d0000
43 #define PVR_CPU_P9 0x004e0000
44 #define PVR_CPU_MASK 0xffff0000
45
46 #define PVR_ISA_207 0x0f000004
47 #define PVR_ISA_300 0x0f000005
48 #define PVR_ISA_MASK 0xffffffff
49
50 /* loader version of kernel's CPU_MAXSIZE */
51 #define MAX_CPUS ((uint32_t)256u)
52
53 /* Option Vectors' settings */
54
55 /* length of ignored OV */
56 #define OV_IGN_LEN 0
57
58 /* byte 1 (of any OV) */
59 #define OV_IGN 0x80
60
61 /* Option Vector 5 */
62
63 /* byte 2 */
64 #define OV5_LPAR 0x80
65 #define OV5_SPLPAR 0x40
66 #define OV5_DRMEM 0x20
67 #define OV5_LP 0x10
68 #define OV5_ALPHA_PART 0x08
69 #define OV5_DMA_DELAY 0x04
70 #define OV5_DONATE_CPU 0x02
71 #define OV5_MSI 0x01
72
73 /* 9-12: max cpus */
74 #define OV5_MAX_CPUS(n) ((MAX_CPUS >> (3*8 - (n)*8)) & 0xff)
75
76 /* 13-14: LoPAPR Level */
77 #define LOPAPR_LEVEL 0x0101 /* 1.1 */
78 #define OV5_LOPAPR_LEVEL(n) ((LOPAPR_LEVEL >> (8 - (n)*8)) & 0xff)
79
80 /* byte 17: Platform Facilities */
81 #define OV5_RNG 0x80
82 #define OV5_COMP_ENG 0x40
83 #define OV5_ENC_ENG 0x20
84
85 /* byte 21: Sub-Processors */
86 #define OV5_NO_SUBPROCS 0
87 #define OV5_SUBPROCS 1
88
89 /* byte 23: interrupt controller */
90 #define OV5_INTC_XICS 0
91
92 /* byte 24: MMU */
93 #define OV5_MMU_INDEX 24
94 #define OV5_MMU_HPT 0
95 #define OV5_MMU_RADIX 0x40
96 #define OV5_MMU_EITHER 0x80
97 #define OV5_MMU_DYNAMIC 0xc0
98
99 /* byte 25: HPT MMU Extensions */
100 #define OV5_HPT_EXT_INDEX 25
101 #define OV5_HPT_GTSE 0x40
102
103 /* byte 26: Radix MMU Extensions */
104 #define OV5_RADIX_EXT_INDEX 26
105 #define OV5_RADIX_GTSE 0x40
106
107
108 struct pvr {
109 uint32_t mask;
110 uint32_t val;
111 };
112
113 struct opt_vec_ignore {
114 char data[2];
115 } __packed;
116
117 struct opt_vec4 {
118 char data[3];
119 } __packed;
120
121 struct opt_vec5 {
122 char data[27];
123 } __packed;
124
125 static struct ibm_arch_vec {
126 struct pvr pvr_list[7];
127 uint8_t num_opts;
128 struct opt_vec_ignore vec1;
129 struct opt_vec_ignore vec2;
130 struct opt_vec_ignore vec3;
131 struct opt_vec4 vec4;
132 struct opt_vec5 vec5;
133 } __packed ibm_arch_vec = {
134 /* pvr_list */ {
135 { htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P8) },
136 { htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P8E) },
137 { htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P8NVL) },
138 { htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P9) },
139 { htobe32(PVR_ISA_MASK), htobe32(PVR_ISA_207) },
140 { htobe32(PVR_ISA_MASK), htobe32(PVR_ISA_300) },
141 { 0, 0xffffffffu } /* terminator */
142 },
143 4, /* num_opts (4 actually means 5 option vectors) */
144 { OV_IGN_LEN, OV_IGN }, /* OV1 */
145 { OV_IGN_LEN, OV_IGN }, /* OV2 */
146 { OV_IGN_LEN, OV_IGN }, /* OV3 */
147 /* OV4 (can't be ignored) */ {
148 sizeof(struct opt_vec4) - 2, /* length (n-2) */
149 0,
150 10 /* Minimum VP entitled capacity percentage * 100
151 * (if absent assume 10%) */
152 },
153 /* OV5 */ {
154 sizeof(struct opt_vec5) - 2, /* length (n-2) */
155 0, /* don't ignore */
156 OV5_LPAR | OV5_SPLPAR | OV5_LP | OV5_MSI,
157 0,
158 0, /* Cooperative Memory Over-commitment */
159 0, /* Associativity Information Option */
160 0, /* Binary Option Controls */
161 0, /* Reserved */
162 0, /* Reserved */
163 OV5_MAX_CPUS(0),
164 OV5_MAX_CPUS(1), /* 10 */
165 OV5_MAX_CPUS(2),
166 OV5_MAX_CPUS(3),
167 OV5_LOPAPR_LEVEL(0),
168 OV5_LOPAPR_LEVEL(1),
169 0, /* Reserved */
170 0, /* Reserved */
171 0, /* Platform Facilities */
172 0, /* Reserved */
173 0, /* Reserved */
174 0, /* Reserved */ /* 20 */
175 OV5_NO_SUBPROCS,
176 0, /* DRMEM_V2 */
177 OV5_INTC_XICS,
178 OV5_MMU_HPT,
179 0,
180 0
181 }
182 };
183
184 int
ppc64_cas(void)185 ppc64_cas(void)
186 {
187 phandle_t pkg;
188 ihandle_t inst;
189 cell_t err;
190 uint8_t buf[16], idx, val;
191 int i, len, rc, radix_mmu;
192 const char *var;
193 char *ov5;
194
195 pkg = OF_finddevice("/chosen");
196 if (pkg == -1) {
197 printf("cas: couldn't find /chosen\n");
198 return (-1);
199 }
200
201 len = OF_getprop(pkg, "ibm,arch-vec-5-platform-support", buf,
202 sizeof(buf));
203 if (len == -1)
204 /* CAS not supported */
205 return (0);
206
207 radix_mmu = 0;
208 ov5 = ibm_arch_vec.vec5.data;
209 for (i = 0; i < len; i += 2) {
210 idx = buf[i];
211 val = buf[i + 1];
212 DPRINTF("idx 0x%02x val 0x%02x\n", idx, val);
213
214 switch (idx) {
215 case OV5_MMU_INDEX:
216 /*
217 * Note that testing for OV5_MMU_RADIX/OV5_MMU_EITHER
218 * also covers OV5_MMU_DYNAMIC.
219 */
220 if ((val & OV5_MMU_RADIX) || (val & OV5_MMU_EITHER))
221 radix_mmu = 1;
222 break;
223
224 case OV5_RADIX_EXT_INDEX:
225 if (val & OV5_RADIX_GTSE)
226 ov5[idx] = OV5_RADIX_GTSE;
227 break;
228
229 case OV5_HPT_EXT_INDEX:
230 default:
231 break;
232 }
233 }
234
235 if (!radix_mmu)
236 /*
237 * If radix is not supported, set radix_mmu to 0 to avoid
238 * the kernel trying to use it and panic.
239 */
240 setenv("radix_mmu", "0", 1);
241 else if ((var = getenv("radix_mmu")) != NULL && var[0] == '0')
242 radix_mmu = 0;
243 else
244 ov5[OV5_MMU_INDEX] = OV5_MMU_RADIX;
245
246 inst = OF_open("/");
247 if (inst == -1) {
248 printf("cas: failed to open / node\n");
249 return (-1);
250 }
251
252 DPRINTF("MMU 0x%02x RADIX_EXT 0x%02x\n",
253 ov5[OV5_MMU_INDEX], ov5[OV5_RADIX_EXT_INDEX]);
254 rc = OF_call_method("ibm,client-architecture-support",
255 inst, 1, 1, &ibm_arch_vec, &err);
256 if (rc != 0 || err) {
257 printf("cas: CAS method returned an error: rc %d err %jd\n",
258 rc, (intmax_t)err);
259 rc = -1;
260 }
261
262 OF_close(inst);
263 printf("cas: selected %s MMU\n", radix_mmu ? "radix" : "hash");
264 return (rc);
265 }
266