1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * Copyright (c) 1994 John S. Dyson 7 * All rights reserved. 8 * Copyright (c) 2003 Peter Wemm 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * William Jolitz. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the University of 25 * California, Berkeley and its contributors. 26 * 4. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 * 42 * from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91 43 */ 44 45 #ifndef _MACHINE_VMPARAM_H_ 46 #define _MACHINE_VMPARAM_H_ 1 47 48 /* 49 * Machine dependent constants for AMD64. 50 */ 51 52 /* 53 * Virtual memory related constants, all in bytes 54 */ 55 #define MAXTSIZ (32768UL*1024*1024) /* max text size */ 56 #ifndef DFLDSIZ 57 #define DFLDSIZ (32768UL*1024*1024) /* initial data size limit */ 58 #endif 59 #ifndef MAXDSIZ 60 #define MAXDSIZ (32768UL*1024*1024) /* max data size */ 61 #endif 62 #ifndef DFLSSIZ 63 #define DFLSSIZ (8UL*1024*1024) /* initial stack size limit */ 64 #endif 65 #ifndef MAXSSIZ 66 #define MAXSSIZ (512UL*1024*1024) /* max stack size */ 67 #endif 68 #ifndef SGROWSIZ 69 #define SGROWSIZ (128UL*1024) /* amount to grow stack */ 70 #endif 71 72 /* 73 * We provide a machine specific single page allocator through the use 74 * of the direct mapped segment. This uses 2MB pages for reduced 75 * TLB pressure. 76 */ 77 #ifndef KASAN 78 #define UMA_MD_SMALL_ALLOC 79 #endif 80 81 /* 82 * The physical address space is densely populated. 83 */ 84 #define VM_PHYSSEG_DENSE 85 86 /* 87 * The number of PHYSSEG entries must be one greater than the number 88 * of phys_avail entries because the phys_avail entry that spans the 89 * largest physical address that is accessible by ISA DMA is split 90 * into two PHYSSEG entries. 91 */ 92 #define VM_PHYSSEG_MAX 63 93 94 /* 95 * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool 96 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is 97 * the pool from which physical pages for page tables and small UMA 98 * objects are allocated. 99 */ 100 #define VM_NFREEPOOL 2 101 #define VM_FREEPOOL_DEFAULT 0 102 #define VM_FREEPOOL_DIRECT 1 103 104 /* 105 * Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages 106 * that have physical addresses below 4G but are not accessible by ISA DMA, 107 * and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA 108 * DMA. 109 */ 110 #define VM_NFREELIST 3 111 #define VM_FREELIST_DEFAULT 0 112 #define VM_FREELIST_DMA32 1 113 #define VM_FREELIST_LOWMEM 2 114 115 #define VM_LOWMEM_BOUNDARY (16 << 20) /* 16MB ISA DMA limit */ 116 117 /* 118 * Create the DMA32 free list only if the number of physical pages above 119 * physical address 4G is at least 16M, which amounts to 64GB of physical 120 * memory. 121 */ 122 #define VM_DMA32_NPAGES_THRESHOLD 16777216 123 124 /* 125 * An allocation size of 16MB is supported in order to optimize the 126 * use of the direct map by UMA. Specifically, a cache line contains 127 * at most 8 PDEs, collectively mapping 16MB of physical memory. By 128 * reducing the number of distinct 16MB "pages" that are used by UMA, 129 * the physical memory allocator reduces the likelihood of both 2MB 130 * page TLB misses and cache misses caused by 2MB page TLB misses. 131 */ 132 #define VM_NFREEORDER 13 133 134 /* 135 * Enable superpage reservations: 1 level. 136 */ 137 #ifndef VM_NRESERVLEVEL 138 #define VM_NRESERVLEVEL 1 139 #endif 140 141 /* 142 * Level 0 reservations consist of 512 pages. 143 */ 144 #ifndef VM_LEVEL_0_ORDER 145 #define VM_LEVEL_0_ORDER 9 146 #endif 147 148 #ifdef SMP 149 #define PA_LOCK_COUNT 256 150 #endif 151 152 /* 153 * Kernel physical load address for non-UEFI boot and for legacy UEFI loader. 154 * Newer UEFI loader loads kernel anywhere below 4G, with memory allocated 155 * by boot services. 156 * Needs to be aligned at 2MB superpage boundary. 157 */ 158 #ifndef KERNLOAD 159 #define KERNLOAD 0x200000 160 #endif 161 162 /* 163 * Virtual addresses of things. Derived from the page directory and 164 * page table indexes from pmap.h for precision. 165 * 166 * 0x0000000000000000 - 0x00007fffffffffff user map 167 * 0x0000800000000000 - 0xffff7fffffffffff does not exist (hole) 168 * 0xffff800000000000 - 0xffff804020100fff recursive page table (512GB slot) 169 * 0xffff804020100fff - 0xffff807fffffffff unused 170 * 0xffff808000000000 - 0xffff847fffffffff large map (can be tuned up) 171 * 0xffff848000000000 - 0xfffff77fffffffff unused (large map extends there) 172 * 0xfffff60000000000 - 0xfffff7ffffffffff 2TB KMSAN origin map, optional 173 * 0xfffff78000000000 - 0xfffff7bfffffffff 512GB KASAN shadow map, optional 174 * 0xfffff80000000000 - 0xfffffbffffffffff 4TB direct map 175 * 0xfffffc0000000000 - 0xfffffdffffffffff 2TB KMSAN shadow map, optional 176 * 0xfffffe0000000000 - 0xffffffffffffffff 2TB kernel map 177 * 178 * Within the kernel map: 179 * 180 * 0xfffffe0000000000 vm_page_array 181 * 0xffffffff80000000 KERNBASE 182 */ 183 184 #define VM_MIN_KERNEL_ADDRESS KV4ADDR(KPML4BASE, 0, 0, 0) 185 #define VM_MAX_KERNEL_ADDRESS KV4ADDR(KPML4BASE + NKPML4E - 1, \ 186 NPDPEPG-1, NPDEPG-1, NPTEPG-1) 187 188 #define DMAP_MIN_ADDRESS KV4ADDR(DMPML4I, 0, 0, 0) 189 #define DMAP_MAX_ADDRESS KV4ADDR(DMPML4I + NDMPML4E, 0, 0, 0) 190 191 #define KASAN_MIN_ADDRESS KV4ADDR(KASANPML4I, 0, 0, 0) 192 #define KASAN_MAX_ADDRESS KV4ADDR(KASANPML4I + NKASANPML4E, 0, 0, 0) 193 194 #define KMSAN_SHAD_MIN_ADDRESS KV4ADDR(KMSANSHADPML4I, 0, 0, 0) 195 #define KMSAN_SHAD_MAX_ADDRESS KV4ADDR(KMSANSHADPML4I + NKMSANSHADPML4E, \ 196 0, 0, 0) 197 198 #define KMSAN_ORIG_MIN_ADDRESS KV4ADDR(KMSANORIGPML4I, 0, 0, 0) 199 #define KMSAN_ORIG_MAX_ADDRESS KV4ADDR(KMSANORIGPML4I + NKMSANORIGPML4E, \ 200 0, 0, 0) 201 202 #define LARGEMAP_MIN_ADDRESS KV4ADDR(LMSPML4I, 0, 0, 0) 203 #define LARGEMAP_MAX_ADDRESS KV4ADDR(LMEPML4I + 1, 0, 0, 0) 204 205 /* 206 * Formally kernel mapping starts at KERNBASE, but kernel linker 207 * script leaves first PDE reserved. For legacy BIOS boot, kernel is 208 * loaded at KERNLOAD = 2M, and initial kernel page table maps 209 * physical memory from zero to KERNend starting at KERNBASE. 210 * 211 * KERNSTART is where the first actual kernel page is mapped, after 212 * the compatibility mapping. 213 */ 214 #define KERNBASE KV4ADDR(KPML4I, KPDPI, 0, 0) 215 #define KERNSTART (KERNBASE + NBPDR) 216 217 #define UPT_MAX_ADDRESS KV4ADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I) 218 #define UPT_MIN_ADDRESS KV4ADDR(PML4PML4I, 0, 0, 0) 219 220 #define VM_MAXUSER_ADDRESS_LA57 UVADDR(NUPML5E, 0, 0, 0, 0) 221 #define VM_MAXUSER_ADDRESS_LA48 UVADDR(0, NUP4ML4E, 0, 0, 0) 222 #define VM_MAXUSER_ADDRESS VM_MAXUSER_ADDRESS_LA57 223 224 #define SHAREDPAGE_LA57 (VM_MAXUSER_ADDRESS_LA57 - PAGE_SIZE) 225 #define SHAREDPAGE_LA48 (VM_MAXUSER_ADDRESS_LA48 - PAGE_SIZE) 226 #define USRSTACK_LA57 SHAREDPAGE_LA57 227 #define USRSTACK_LA48 SHAREDPAGE_LA48 228 #define USRSTACK USRSTACK_LA48 229 #define PS_STRINGS_LA57 (USRSTACK_LA57 - sizeof(struct ps_strings)) 230 #define PS_STRINGS_LA48 (USRSTACK_LA48 - sizeof(struct ps_strings)) 231 232 #define VM_MAX_ADDRESS UPT_MAX_ADDRESS 233 #define VM_MIN_ADDRESS (0) 234 235 /* 236 * XXX Allowing dmaplimit == 0 is a temporary workaround for vt(4) efifb's 237 * early use of PHYS_TO_DMAP before the mapping is actually setup. This works 238 * because the result is not actually accessed until later, but the early 239 * vt fb startup needs to be reworked. 240 */ 241 #define PHYS_IN_DMAP(pa) (dmaplimit == 0 || (pa) < dmaplimit) 242 #define VIRT_IN_DMAP(va) ((va) >= DMAP_MIN_ADDRESS && \ 243 (va) < (DMAP_MIN_ADDRESS + dmaplimit)) 244 245 #define PMAP_HAS_DMAP 1 246 #define PHYS_TO_DMAP(x) ({ \ 247 KASSERT(PHYS_IN_DMAP(x), \ 248 ("physical address %#jx not covered by the DMAP", \ 249 (uintmax_t)x)); \ 250 (x) | DMAP_MIN_ADDRESS; }) 251 252 #define DMAP_TO_PHYS(x) ({ \ 253 KASSERT(VIRT_IN_DMAP(x), \ 254 ("virtual address %#jx not covered by the DMAP", \ 255 (uintmax_t)x)); \ 256 (x) & ~DMAP_MIN_ADDRESS; }) 257 258 /* 259 * amd64 maps the page array into KVA so that it can be more easily 260 * allocated on the correct memory domains. 261 */ 262 #define PMAP_HAS_PAGE_ARRAY 1 263 264 /* 265 * How many physical pages per kmem arena virtual page. 266 */ 267 #ifndef VM_KMEM_SIZE_SCALE 268 #define VM_KMEM_SIZE_SCALE (1) 269 #endif 270 271 /* 272 * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the 273 * kernel map. 274 */ 275 #ifndef VM_KMEM_SIZE_MAX 276 #define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \ 277 VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5) 278 #endif 279 280 /* initial pagein size of beginning of executable file */ 281 #ifndef VM_INITIAL_PAGEIN 282 #define VM_INITIAL_PAGEIN 16 283 #endif 284 285 #define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */ 286 287 /* 288 * Use a fairly large batch size since we expect amd64 systems to have lots of 289 * memory. 290 */ 291 #define VM_BATCHQUEUE_SIZE 31 292 293 /* 294 * The pmap can create non-transparent large page mappings. 295 */ 296 #define PMAP_HAS_LARGEPAGES 1 297 298 /* 299 * Need a page dump array for minidump. 300 */ 301 #define MINIDUMP_PAGE_TRACKING 1 302 303 #endif /* _MACHINE_VMPARAM_H_ */ 304