1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright 2016 Michal Meloun <mmel@FreeBSD.org>
5 *
6 * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/fbio.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/rman.h>
38 #include <sys/resource.h>
39 #include <machine/bus.h>
40 #include <vm/vm.h>
41 #include <vm/vm_extern.h>
42 #include <vm/vm_kern.h>
43 #include <vm/pmap.h>
44
45 #include <dev/fdt/simplebus.h>
46
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49
50 #include <arm/ti/clk/ti_clk_clkctrl.h>
51 #include <arm/ti/ti_omap4_cm.h>
52 #include <arm/ti/ti_cpuid.h>
53
54 #if 0
55 #define DPRINTF(dev, msg...) device_printf(dev, msg)
56 #else
57 #define DPRINTF(dev, msg...)
58 #endif
59
60 #define L4LS_CLKCTRL_38 2
61 #define L4_WKUP_CLKCTRL_0 1
62 #define NO_SPECIAL_REG 0
63
64 /* Documentation/devicetree/bindings/clock/ti-clkctrl.txt */
65
66 #define TI_CLKCTRL_L4_WKUP 5
67 #define TI_CLKCTRL_L4_SECURE 4
68 #define TI_CLKCTRL_L4_PER 3
69 #define TI_CLKCTRL_L4_CFG 2
70 #define TI_CLKCTRL 1
71 #define TI_CLKCTRL_END 0
72
73 static struct ofw_compat_data compat_data[] = {
74 { "ti,clkctrl-l4-wkup", TI_CLKCTRL_L4_WKUP },
75 { "ti,clkctrl-l4-secure", TI_CLKCTRL_L4_SECURE },
76 { "ti,clkctrl-l4-per", TI_CLKCTRL_L4_PER },
77 { "ti,clkctrl-l4-cfg", TI_CLKCTRL_L4_CFG },
78 { "ti,clkctrl", TI_CLKCTRL },
79 { NULL, TI_CLKCTRL_END }
80 };
81
82 struct ti_clkctrl_softc {
83 device_t dev;
84
85 struct clkdom *clkdom;
86 };
87
88 static int ti_clkctrl_probe(device_t dev);
89 static int ti_clkctrl_attach(device_t dev);
90 static int ti_clkctrl_detach(device_t dev);
91 int clkctrl_ofw_map(struct clkdom *clkdom, uint32_t ncells,
92 phandle_t *cells, struct clknode **clk);
93 static int
94 create_clkctrl(struct ti_clkctrl_softc *sc, cell_t *reg, uint32_t index, uint32_t reg_offset,
95 uint64_t parent_offset, const char *org_name, bool special_gdbclk_reg);
96
97 static int
ti_clkctrl_probe(device_t dev)98 ti_clkctrl_probe(device_t dev)
99 {
100 if (!ofw_bus_status_okay(dev))
101 return (ENXIO);
102
103 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
104 return (ENXIO);
105
106 device_set_desc(dev, "TI clkctrl");
107
108 return (BUS_PROBE_DEFAULT);
109 }
110
111 static int
ti_clkctrl_attach(device_t dev)112 ti_clkctrl_attach(device_t dev)
113 {
114 struct ti_clkctrl_softc *sc;
115 phandle_t node;
116 cell_t *reg;
117 ssize_t numbytes_reg;
118 int num_reg, err, ti_clock_cells;
119 uint32_t index, reg_offset, reg_address;
120 const char *org_name;
121 uint64_t parent_offset;
122 uint8_t special_reg = NO_SPECIAL_REG;
123
124 sc = device_get_softc(dev);
125 sc->dev = dev;
126 node = ofw_bus_get_node(dev);
127
128 /* Sanity check */
129 err = OF_searchencprop(node, "#clock-cells",
130 &ti_clock_cells, sizeof(ti_clock_cells));
131 if (err == -1) {
132 device_printf(sc->dev, "Failed to get #clock-cells\n");
133 return (ENXIO);
134 }
135
136 if (ti_clock_cells != 2) {
137 device_printf(sc->dev, "clock cells(%d) != 2\n",
138 ti_clock_cells);
139 return (ENXIO);
140 }
141
142 /* Grab the content of reg properties */
143 numbytes_reg = OF_getproplen(node, "reg");
144 if (numbytes_reg == 0) {
145 device_printf(sc->dev, "reg property empty - check your devicetree\n");
146 return (ENXIO);
147 }
148 num_reg = numbytes_reg / sizeof(cell_t);
149
150 reg = malloc(numbytes_reg, M_DEVBUF, M_WAITOK);
151 OF_getencprop(node, "reg", reg, numbytes_reg);
152
153 /* Create clock domain */
154 sc->clkdom = clkdom_create(sc->dev);
155 if (sc->clkdom == NULL) {
156 free(reg, M_DEVBUF);
157 DPRINTF(sc->dev, "Failed to create clkdom\n");
158 return (ENXIO);
159 }
160 clkdom_set_ofw_mapper(sc->clkdom, clkctrl_ofw_map);
161
162 /* Create clock nodes */
163 /* name */
164 clk_parse_ofw_clk_name(sc->dev, node, &org_name);
165
166 /* Get parent range */
167 parent_offset = ti_omap4_cm_get_simplebus_base_host(device_get_parent(dev));
168
169 /* Check if this is a clkctrl with special registers like gpio */
170 switch (ti_chip()) {
171 #ifdef SOC_OMAP4
172 case CHIP_OMAP_4:
173 /* FIXME: Todo */
174 break;
175
176 #endif /* SOC_OMAP4 */
177 #ifdef SOC_TI_AM335X
178 /* Checkout TRM 8.1.12.1.29 - 8.1.12.31 and 8.1.12.2.3
179 * and the DTS.
180 */
181 case CHIP_AM335X:
182 if (strcmp(org_name, "l4ls-clkctrl@38") == 0)
183 special_reg = L4LS_CLKCTRL_38;
184 else if (strcmp(org_name, "l4-wkup-clkctrl@0") == 0)
185 special_reg = L4_WKUP_CLKCTRL_0;
186 break;
187 #endif /* SOC_TI_AM335X */
188 default:
189 break;
190 }
191
192 /* reg property has a pair of (base address, length) */
193 for (index = 0; index < num_reg; index += 2) {
194 for (reg_offset = 0; reg_offset < reg[index+1]; reg_offset += sizeof(cell_t)) {
195 err = create_clkctrl(sc, reg, index, reg_offset, parent_offset,
196 org_name, false);
197 if (err)
198 goto cleanup;
199
200 /* Create special clkctrl for GDBCLK in GPIO registers */
201 switch (special_reg) {
202 case NO_SPECIAL_REG:
203 break;
204 case L4LS_CLKCTRL_38:
205 reg_address = reg[index] + reg_offset-reg[0];
206 if (reg_address == 0x74 ||
207 reg_address == 0x78 ||
208 reg_address == 0x7C)
209 {
210 err = create_clkctrl(sc, reg, index, reg_offset,
211 parent_offset, org_name, true);
212 if (err)
213 goto cleanup;
214 }
215 break;
216 case L4_WKUP_CLKCTRL_0:
217 reg_address = reg[index] + reg_offset - reg[0];
218 if (reg_address == 0x8)
219 {
220 err = create_clkctrl(sc, reg, index, reg_offset,
221 parent_offset, org_name, true);
222 if (err)
223 goto cleanup;
224 }
225 break;
226 } /* switch (special_reg) */
227 } /* inner for */
228 } /* for */
229
230 err = clkdom_finit(sc->clkdom);
231 if (err) {
232 DPRINTF(sc->dev, "Clk domain finit fails %x.\n", err);
233 err = ENXIO;
234 goto cleanup;
235 }
236
237 cleanup:
238 OF_prop_free(__DECONST(char *, org_name));
239
240 free(reg, M_DEVBUF);
241
242 if (err)
243 return (err);
244
245 return (bus_generic_attach(dev));
246 }
247
248 static int
ti_clkctrl_detach(device_t dev)249 ti_clkctrl_detach(device_t dev)
250 {
251 return (EBUSY);
252 }
253
254 /* modified version of default mapper from clk.c */
255 int
clkctrl_ofw_map(struct clkdom * clkdom,uint32_t ncells,phandle_t * cells,struct clknode ** clk)256 clkctrl_ofw_map(struct clkdom *clkdom, uint32_t ncells,
257 phandle_t *cells, struct clknode **clk) {
258 if (ncells == 0)
259 *clk = clknode_find_by_id(clkdom, 1);
260 else if (ncells == 1)
261 *clk = clknode_find_by_id(clkdom, cells[0]);
262 else if (ncells == 2) {
263 /* To avoid collision with other IDs just add one.
264 * All other registers has an offset of 4 from each other.
265 */
266 if (cells[1])
267 *clk = clknode_find_by_id(clkdom, cells[0]+1);
268 else
269 *clk = clknode_find_by_id(clkdom, cells[0]);
270 }
271 else
272 return (ERANGE);
273
274 if (*clk == NULL)
275 return (ENXIO);
276
277 return (0);
278 }
279
280 static int
create_clkctrl(struct ti_clkctrl_softc * sc,cell_t * reg,uint32_t index,uint32_t reg_offset,uint64_t parent_offset,const char * org_name,bool special_gdbclk_reg)281 create_clkctrl(struct ti_clkctrl_softc *sc, cell_t *reg, uint32_t index, uint32_t reg_offset,
282 uint64_t parent_offset, const char *org_name, bool special_gdbclk_reg) {
283 struct ti_clk_clkctrl_def def;
284 char *name;
285 size_t name_len;
286 int err;
287
288 name_len = strlen(org_name) + 1 + 5; /* 5 = _xxxx */
289 name = malloc(name_len, M_OFWPROP, M_WAITOK);
290
291 /*
292 * Check out XX_CLKCTRL-INDEX(offset)-macro dance in
293 * sys/gnu/dts/dts/include/dt-bindings/clock/am3.h
294 * sys/gnu/dts/dts/include/dt-bindings/clock/am4.h
295 * sys/gnu/dts/dts/include/dt-bindings/clock/dra7.h
296 * reg[0] are in practice the same as the offset described in the dts.
297 */
298 /* special_gdbclk_reg are 0 or 1 */
299 def.clkdef.id = reg[index] + reg_offset - reg[0] + special_gdbclk_reg;
300 def.register_offset = parent_offset + reg[index] + reg_offset;
301
302 /* Indicate this clkctrl is special and dont use IDLEST/MODULEMODE */
303 def.gdbclk = special_gdbclk_reg;
304
305 /* Make up an uniq name in the namespace for each clkctrl */
306 snprintf(name, name_len, "%s_%x",
307 org_name, def.clkdef.id);
308 def.clkdef.name = (const char *) name;
309
310 DPRINTF(sc->dev, "ti_clkctrl_attach: reg[%d]: %s %x\n",
311 index, def.clkdef.name, def.clkdef.id);
312
313 /* No parent name */
314 def.clkdef.parent_cnt = 0;
315
316 /* set flags */
317 def.clkdef.flags = 0x0;
318
319 /* Register the clkctrl */
320 err = ti_clknode_clkctrl_register(sc->clkdom, &def);
321 if (err) {
322 DPRINTF(sc->dev,
323 "ti_clknode_clkctrl_register[%d:%d] failed %x\n",
324 index, reg_offset, err);
325 err = ENXIO;
326 }
327 OF_prop_free(name);
328 return (err);
329 }
330
331 static device_method_t ti_clkctrl_methods[] = {
332 /* Device interface */
333 DEVMETHOD(device_probe, ti_clkctrl_probe),
334 DEVMETHOD(device_attach, ti_clkctrl_attach),
335 DEVMETHOD(device_detach, ti_clkctrl_detach),
336
337 DEVMETHOD_END
338 };
339
340 DEFINE_CLASS_0(ti_clkctrl, ti_clkctrl_driver, ti_clkctrl_methods,
341 sizeof(struct ti_clkctrl_softc));
342
343 static devclass_t ti_clkctrl_devclass;
344
345 EARLY_DRIVER_MODULE(ti_clkctrl, simplebus, ti_clkctrl_driver,
346 ti_clkctrl_devclass, 0, 0, BUS_PASS_BUS+BUS_PASS_ORDER_MIDDLE);
347
348 MODULE_VERSION(ti_clkctrl, 1);
349