1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 #include <sys/param.h>
30 #include <sys/conf.h>
31 #include <sys/bus.h>
32 #include <sys/kernel.h>
33 #include <sys/module.h>
34 #include <sys/systm.h>
35 #include <sys/libkern.h>
36 #include <sys/types.h>
37 #include <sys/malloc.h>
38
39 #include <machine/bus.h>
40 #include <dev/fdt/simplebus.h>
41
42 #include <dev/extres/clk/clk_mux.h>
43 #include <dev/ofw/ofw_bus.h>
44 #include <dev/ofw/ofw_bus_subr.h>
45
46 #include "clock_common.h"
47
48 #if 0
49 #define DPRINTF(dev, msg...) device_printf(dev, msg)
50 #else
51 #define DPRINTF(dev, msg...)
52 #endif
53
54 /*
55 * Devicetree description
56 * Documentation/devicetree/bindings/clock/ti/mux.txt
57 */
58
59 struct ti_mux_softc {
60 device_t sc_dev;
61 bool attach_done;
62
63 struct clk_mux_def mux_def;
64 struct clock_cell_info clock_cell;
65 struct clkdom *clkdom;
66 };
67
68 static int ti_mux_probe(device_t dev);
69 static int ti_mux_attach(device_t dev);
70 static int ti_mux_detach(device_t dev);
71
72 #define TI_MUX_CLOCK 2
73 #define TI_COMPOSITE_MUX_CLOCK 1
74 #define TI_MUX_END 0
75
76 static struct ofw_compat_data compat_data[] = {
77 { "ti,mux-clock", TI_MUX_CLOCK },
78 { "ti,composite-mux-clock", TI_COMPOSITE_MUX_CLOCK },
79 { NULL, TI_MUX_END }
80 };
81
82 static int
ti_mux_probe(device_t dev)83 ti_mux_probe(device_t dev)
84 {
85 if (!ofw_bus_status_okay(dev))
86 return (ENXIO);
87
88 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
89 return (ENXIO);
90
91 device_set_desc(dev, "TI Mux Clock");
92
93 return (BUS_PROBE_DEFAULT);
94 }
95
96 static int
register_clk(struct ti_mux_softc * sc)97 register_clk(struct ti_mux_softc *sc) {
98 int err;
99
100 sc->clkdom = clkdom_create(sc->sc_dev);
101 if (sc->clkdom == NULL) {
102 DPRINTF(sc->sc_dev, "Failed to create clkdom\n");
103 return ENXIO;
104 }
105
106 err = clknode_mux_register(sc->clkdom, &sc->mux_def);
107 if (err) {
108 DPRINTF(sc->sc_dev, "clknode_mux_register failed %x\n", err);
109 return ENXIO;
110 }
111
112 err = clkdom_finit(sc->clkdom);
113 if (err) {
114 DPRINTF(sc->sc_dev, "Clk domain finit fails %x.\n", err);
115 return ENXIO;
116 }
117
118 return 0;
119 }
120
121 static int
ti_mux_attach(device_t dev)122 ti_mux_attach(device_t dev)
123 {
124 struct ti_mux_softc *sc;
125 phandle_t node;
126 int err;
127 cell_t value;
128
129 sc = device_get_softc(dev);
130 sc->sc_dev = dev;
131 node = ofw_bus_get_node(dev);
132
133 /* Grab the content of reg properties */
134 OF_getencprop(node, "reg", &value, sizeof(value));
135 sc->mux_def.offset = value;
136
137 if (OF_hasprop(node, "ti,bit-shift")) {
138 OF_getencprop(node, "ti,bit-shift", &value, sizeof(value));
139 sc->mux_def.shift = value;
140 DPRINTF(sc->sc_dev, "ti,bit-shift => shift %x\n", sc->mux_def.shift);
141 }
142 if (OF_hasprop(node, "ti,index-starts-at-one")) {
143 /* FIXME: Add support in dev/extres/clk */
144 /*sc->mux_def.mux_flags = ... */
145 device_printf(sc->sc_dev, "ti,index-starts-at-one - Not implemented\n");
146 }
147
148 if (OF_hasprop(node, "ti,set-rate-parent"))
149 device_printf(sc->sc_dev, "ti,set-rate-parent - Not implemented\n");
150 if (OF_hasprop(node, "ti,latch-bit"))
151 device_printf(sc->sc_dev, "ti,latch-bit - Not implemented\n");
152
153 read_clock_cells(sc->sc_dev, &sc->clock_cell);
154
155 create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
156
157 /* Figure out the width from ti_max_div */
158 if (sc->mux_def.mux_flags)
159 sc->mux_def.width = fls(sc->clock_cell.num_real_clocks-1);
160 else
161 sc->mux_def.width = fls(sc->clock_cell.num_real_clocks);
162
163 DPRINTF(sc->sc_dev, "sc->clock_cell.num_real_clocks %x def.width %x\n",
164 sc->clock_cell.num_real_clocks, sc->mux_def.width);
165
166 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
167
168 if (err) {
169 /* free_clkdef will be called in ti_mux_new_pass */
170 DPRINTF(sc->sc_dev, "find_parent_clock_names failed\n");
171 return (bus_generic_attach(sc->sc_dev));
172 }
173
174 err = register_clk(sc);
175
176 if (err) {
177 /* free_clkdef will be called in ti_mux_new_pass */
178 DPRINTF(sc->sc_dev, "register_clk failed\n");
179 return (bus_generic_attach(sc->sc_dev));
180 }
181
182 sc->attach_done = true;
183
184 free_clkdef(&sc->mux_def.clkdef);
185
186 return (bus_generic_attach(sc->sc_dev));
187 }
188
189 static void
ti_mux_new_pass(device_t dev)190 ti_mux_new_pass(device_t dev)
191 {
192 struct ti_mux_softc *sc;
193 int err;
194
195 sc = device_get_softc(dev);
196
197 if (sc->attach_done) {
198 return;
199 }
200
201 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
202 if (err) {
203 /* free_clkdef will be called in later call to ti_mux_new_pass */
204 DPRINTF(sc->sc_dev, "ti_mux_new_pass find_parent_clock_names failed\n");
205 return;
206 }
207
208 err = register_clk(sc);
209 if (err) {
210 /* free_clkdef will be called in later call to ti_mux_new_pass */
211 DPRINTF(sc->sc_dev, "ti_mux_new_pass register_clk failed\n");
212 return;
213 }
214
215 sc->attach_done = true;
216
217 free_clkdef(&sc->mux_def.clkdef);
218 }
219
220 static int
ti_mux_detach(device_t dev)221 ti_mux_detach(device_t dev)
222 {
223 return (EBUSY);
224 }
225
226 static device_method_t ti_mux_methods[] = {
227 /* Device interface */
228 DEVMETHOD(device_probe, ti_mux_probe),
229 DEVMETHOD(device_attach, ti_mux_attach),
230 DEVMETHOD(device_detach, ti_mux_detach),
231
232 /* Bus interface */
233 DEVMETHOD(bus_new_pass, ti_mux_new_pass),
234
235 DEVMETHOD_END
236 };
237
238 DEFINE_CLASS_0(ti_mux, ti_mux_driver, ti_mux_methods,
239 sizeof(struct ti_mux_softc));
240
241 static devclass_t ti_mux_devclass;
242
243 EARLY_DRIVER_MODULE(ti_mux, simplebus, ti_mux_driver,
244 ti_mux_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
245 MODULE_VERSION(ti_mux, 1);
246