1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright 2016 Michal Meloun <mmel@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 #include <sys/param.h>
31 #include <sys/conf.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/systm.h>
35
36 #include <machine/bus.h>
37
38 #include <dev/extres/clk/clk.h>
39 #include <dev/extres/syscon/syscon.h>
40
41 #include <arm64/rockchip/clk/rk_cru.h>
42 #include <arm64/rockchip/clk/rk_clk_mux.h>
43
44 #include "clkdev_if.h"
45 #include "syscon_if.h"
46
47 #define WR4(_clk, off, val) \
48 CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
49 #define RD4(_clk, off, val) \
50 CLKDEV_READ_4(clknode_get_device(_clk), off, val)
51 #define MD4(_clk, off, clr, set ) \
52 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
53 #define DEVICE_LOCK(_clk) \
54 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
55 #define DEVICE_UNLOCK(_clk) \
56 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
57
58 #if 0
59 #define dprintf(format, arg...) \
60 printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg)
61 #else
62 #define dprintf(format, arg...)
63 #endif
64
65 static int rk_clk_mux_init(struct clknode *clk, device_t dev);
66 static int rk_clk_mux_set_mux(struct clknode *clk, int idx);
67 static int rk_clk_mux_set_freq(struct clknode *clk, uint64_t fparent,
68 uint64_t *fout, int flags, int *stop);
69
70 struct rk_clk_mux_sc {
71 uint32_t offset;
72 uint32_t shift;
73 uint32_t mask;
74 int mux_flags;
75 struct syscon *grf;
76 };
77
78 static clknode_method_t rk_clk_mux_methods[] = {
79 /* Device interface */
80 CLKNODEMETHOD(clknode_init, rk_clk_mux_init),
81 CLKNODEMETHOD(clknode_set_mux, rk_clk_mux_set_mux),
82 CLKNODEMETHOD(clknode_set_freq, rk_clk_mux_set_freq),
83 CLKNODEMETHOD_END
84 };
85 DEFINE_CLASS_1(rk_clk_mux, rk_clk_mux_class, rk_clk_mux_methods,
86 sizeof(struct rk_clk_mux_sc), clknode_class);
87
88 static struct syscon *
rk_clk_mux_get_grf(struct clknode * clk)89 rk_clk_mux_get_grf(struct clknode *clk)
90 {
91 device_t dev;
92 phandle_t node;
93 struct syscon *grf;
94
95 grf = NULL;
96 dev = clknode_get_device(clk);
97 node = ofw_bus_get_node(dev);
98 if (OF_hasprop(node, "rockchip,grf") &&
99 syscon_get_by_ofw_property(dev, node,
100 "rockchip,grf", &grf) != 0) {
101 return (NULL);
102 }
103
104 return (grf);
105 }
106
107 static int
rk_clk_mux_init(struct clknode * clk,device_t dev)108 rk_clk_mux_init(struct clknode *clk, device_t dev)
109 {
110 uint32_t reg;
111 struct rk_clk_mux_sc *sc;
112 int rv;
113
114 sc = clknode_get_softc(clk);
115
116 if ((sc->mux_flags & RK_CLK_MUX_GRF) != 0) {
117 sc->grf = rk_clk_mux_get_grf(clk);
118 if (sc->grf == NULL)
119 panic("clock %s has GRF flag set but no syscon is available",
120 clknode_get_name(clk));
121 }
122
123 DEVICE_LOCK(clk);
124 if (sc->grf) {
125 reg = SYSCON_READ_4(sc->grf, sc->offset);
126 rv = 0;
127 } else
128 rv = RD4(clk, sc->offset, ®);
129 DEVICE_UNLOCK(clk);
130 if (rv != 0) {
131 return (rv);
132 }
133 reg = (reg >> sc->shift) & sc->mask;
134 clknode_init_parent_idx(clk, reg);
135 return(0);
136 }
137
138 static int
rk_clk_mux_set_mux(struct clknode * clk,int idx)139 rk_clk_mux_set_mux(struct clknode *clk, int idx)
140 {
141 uint32_t reg;
142 struct rk_clk_mux_sc *sc;
143 int rv;
144
145 sc = clknode_get_softc(clk);
146
147 DEVICE_LOCK(clk);
148 if (sc->grf)
149 rv = SYSCON_MODIFY_4(sc->grf, sc->offset, sc->mask << sc->shift,
150 ((idx & sc->mask) << sc->shift) | RK_CLK_MUX_MASK);
151 else
152 rv = MD4(clk, sc->offset, sc->mask << sc->shift,
153 ((idx & sc->mask) << sc->shift) | RK_CLK_MUX_MASK);
154 if (rv != 0) {
155 DEVICE_UNLOCK(clk);
156 return (rv);
157 }
158 if (sc->grf == NULL)
159 RD4(clk, sc->offset, ®);
160 DEVICE_UNLOCK(clk);
161
162 return(0);
163 }
164
165 static int
rk_clk_mux_set_freq(struct clknode * clk,uint64_t fparent,uint64_t * fout,int flags,int * stop)166 rk_clk_mux_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
167 int flags, int *stop)
168 {
169 struct rk_clk_mux_sc *sc;
170 struct clknode *p_clk, *p_best_clk;
171 const char **p_names;
172 int p_idx, best_parent;
173 int rv;
174
175 sc = clknode_get_softc(clk);
176
177 if ((sc->mux_flags & RK_CLK_MUX_GRF) != 0) {
178 *stop = 1;
179 return (ENOTSUP);
180 }
181 if ((sc->mux_flags & RK_CLK_MUX_REPARENT) == 0) {
182 *stop = 0;
183 return (0);
184 }
185
186 dprintf("Finding best parent for target freq of %ju\n", *fout);
187 p_names = clknode_get_parent_names(clk);
188 for (p_idx = 0; p_idx != clknode_get_parents_num(clk); p_idx++) {
189 p_clk = clknode_find_by_name(p_names[p_idx]);
190 dprintf("Testing with parent %s (%d)\n",
191 clknode_get_name(p_clk), p_idx);
192
193 rv = clknode_set_freq(p_clk, *fout, flags | CLK_SET_DRYRUN, 0);
194 dprintf("Testing with parent %s (%d) rv=%d\n",
195 clknode_get_name(p_clk), p_idx, rv);
196 if (rv == 0) {
197 best_parent = p_idx;
198 p_best_clk = p_clk;
199 *stop = 1;
200 }
201 }
202
203 if (!*stop)
204 return (0);
205
206 if ((flags & CLK_SET_DRYRUN) != 0)
207 return (0);
208
209 p_idx = clknode_get_parent_idx(clk);
210 if (p_idx != best_parent) {
211 dprintf("Switching parent index from %d to %d\n", p_idx,
212 best_parent);
213 clknode_set_parent_by_idx(clk, best_parent);
214 }
215
216 clknode_set_freq(p_best_clk, *fout, flags, 0);
217 clknode_get_freq(p_best_clk, fout);
218
219 return (0);
220 }
221
222 int
rk_clk_mux_register(struct clkdom * clkdom,struct rk_clk_mux_def * clkdef)223 rk_clk_mux_register(struct clkdom *clkdom, struct rk_clk_mux_def *clkdef)
224 {
225 struct clknode *clk;
226 struct rk_clk_mux_sc *sc;
227
228 clk = clknode_create(clkdom, &rk_clk_mux_class, &clkdef->clkdef);
229 if (clk == NULL)
230 return (1);
231
232 sc = clknode_get_softc(clk);
233 sc->offset = clkdef->offset;
234 sc->shift = clkdef->shift;
235 sc->mask = (1 << clkdef->width) - 1;
236 sc->mux_flags = clkdef->mux_flags;
237
238 clknode_register(clkdom, clk);
239 return (0);
240 }
241