1 /***********************license start***************
2 * Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
3 * reserved.
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * * Redistributions in binary form must reproduce the above
14 * copyright notice, this list of conditions and the following
15 * disclaimer in the documentation and/or other materials provided
16 * with the distribution.
17
18 * * Neither the name of Cavium Inc. nor the names of
19 * its contributors may be used to endorse or promote products
20 * derived from this software without specific prior written
21 * permission.
22
23 * This Software, including technical data, may be subject to U.S. export control
24 * laws, including the U.S. Export Administration Act and its associated
25 * regulations, and may be subject to export or import regulations in other
26 * countries.
27
28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38 ***********************license end**************************************/
39
40
41
42
43
44
45
46 /**
47 * @file
48 *
49 * Interface to the on chip key memory. Key memory is
50 * 8k on chip that is inaccessible from off chip. It can
51 * also be cleared using an external hardware pin.
52 *
53 * <hr>$Revision: 70030 $<hr>
54 *
55 */
56
57 #ifndef __CVMX_KEY_H__
58 #define __CVMX_KEY_H__
59
60 #ifdef __cplusplus
61 extern "C" {
62 #endif
63
64 #define CVMX_KEY_MEM_SIZE 8192 /* Size in bytes */
65
66
67 /**
68 * Read from KEY memory
69 *
70 * @param address Address (byte) in key memory to read
71 * 0 <= address < CVMX_KEY_MEM_SIZE
72 * @return Value from key memory
73 */
cvmx_key_read(uint64_t address)74 static inline uint64_t cvmx_key_read(uint64_t address)
75 {
76 cvmx_addr_t ptr;
77
78 ptr.u64 = 0;
79 ptr.sio.mem_region = CVMX_IO_SEG;
80 ptr.sio.is_io = 1;
81 ptr.sio.did = CVMX_OCT_DID_KEY_RW;
82 ptr.sio.offset = address;
83
84 return cvmx_read_csr(ptr.u64);
85 }
86
87
88 /**
89 * Write to KEY memory
90 *
91 * @param address Address (byte) in key memory to write
92 * 0 <= address < CVMX_KEY_MEM_SIZE
93 * @param value Value to write to key memory
94 */
cvmx_key_write(uint64_t address,uint64_t value)95 static inline void cvmx_key_write(uint64_t address, uint64_t value)
96 {
97 cvmx_addr_t ptr;
98
99 ptr.u64 = 0;
100 ptr.sio.mem_region = CVMX_IO_SEG;
101 ptr.sio.is_io = 1;
102 ptr.sio.did = CVMX_OCT_DID_KEY_RW;
103 ptr.sio.offset = address;
104
105 cvmx_write_io(ptr.u64, value);
106 }
107
108
109 /* CSR typedefs have been moved to cvmx-key-defs.h */
110
111 #ifdef __cplusplus
112 }
113 #endif
114
115 #endif /* __CVMX_KEY_H__ */
116