1 /*
2 * Copyright (c) 2015, AVAGO Tech. All rights reserved. Author: Marian Choy
3 * Copyright (c) 2014, LSI Corp. All rights reserved. Author: Marian Choy
4 * Support: freebsdraid@avagotech.com
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer. 2. Redistributions
12 * in binary form must reproduce the above copyright notice, this list of
13 * conditions and the following disclaimer in the documentation and/or other
14 * materials provided with the distribution. 3. Neither the name of the
15 * <ORGANIZATION> nor the names of its contributors may be used to endorse or
16 * promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 *
31 */
32
33 #include <sys/cdefs.h>
34 #include "dev/mrsas/mrsas.h"
35
36 #include <cam/cam.h>
37 #include <cam/cam_ccb.h>
38 #include <cam/cam_sim.h>
39 #include <cam/cam_xpt_sim.h>
40 #include <cam/cam_debug.h>
41 #include <cam/cam_periph.h>
42 #include <cam/cam_xpt_periph.h>
43
44 #include <cam/scsi/scsi_all.h>
45 #include <cam/scsi/scsi_message.h>
46 #include <sys/taskqueue.h>
47 #include <sys/kernel.h>
48
49 #include <sys/time.h> /* XXX for pcpu.h */
50 #include <sys/pcpu.h> /* XXX for PCPU_GET */
51
52 #define smp_processor_id() PCPU_GET(cpuid)
53
54 /*
55 * Function prototypes
56 */
57 int mrsas_cam_attach(struct mrsas_softc *sc);
58 int mrsas_find_io_type(struct cam_sim *sim, union ccb *ccb);
59 int mrsas_bus_scan(struct mrsas_softc *sc);
60 int mrsas_bus_scan_sim(struct mrsas_softc *sc, struct cam_sim *sim);
61 int
62 mrsas_map_request(struct mrsas_softc *sc,
63 struct mrsas_mpt_cmd *cmd, union ccb *ccb);
64 int
65 mrsas_build_ldio_rw(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
66 union ccb *ccb);
67 int
68 mrsas_build_ldio_nonrw(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
69 union ccb *ccb);
70 int
71 mrsas_build_syspdio(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
72 union ccb *ccb, struct cam_sim *sim, u_int8_t fp_possible);
73 int
74 mrsas_setup_io(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
75 union ccb *ccb, u_int32_t device_id,
76 MRSAS_RAID_SCSI_IO_REQUEST * io_request);
77 void mrsas_xpt_freeze(struct mrsas_softc *sc);
78 void mrsas_xpt_release(struct mrsas_softc *sc);
79 void mrsas_cam_detach(struct mrsas_softc *sc);
80 void mrsas_release_mpt_cmd(struct mrsas_mpt_cmd *cmd);
81 void mrsas_unmap_request(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd);
82 void mrsas_cmd_done(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd);
83 void
84 mrsas_fire_cmd(struct mrsas_softc *sc, u_int32_t req_desc_lo,
85 u_int32_t req_desc_hi);
86 void
87 mrsas_set_pd_lba(MRSAS_RAID_SCSI_IO_REQUEST * io_request,
88 u_int8_t cdb_len, struct IO_REQUEST_INFO *io_info, union ccb *ccb,
89 MR_DRV_RAID_MAP_ALL * local_map_ptr, u_int32_t ref_tag,
90 u_int32_t ld_block_size);
91 static void mrsas_freeze_simq(struct mrsas_mpt_cmd *cmd, struct cam_sim *sim);
92 static void mrsas_cam_poll(struct cam_sim *sim);
93 static void mrsas_action(struct cam_sim *sim, union ccb *ccb);
94 static void mrsas_scsiio_timeout(void *data);
95 static int mrsas_track_scsiio(struct mrsas_softc *sc, target_id_t id, u_int32_t bus_id);
96 static void mrsas_tm_response_code(struct mrsas_softc *sc,
97 MPI2_SCSI_TASK_MANAGE_REPLY *mpi_reply);
98 static int mrsas_issue_tm(struct mrsas_softc *sc,
99 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc);
100 static void
101 mrsas_data_load_cb(void *arg, bus_dma_segment_t *segs,
102 int nseg, int error);
103 static int32_t
104 mrsas_startio(struct mrsas_softc *sc, struct cam_sim *sim,
105 union ccb *ccb);
106
107 static boolean_t mrsas_is_prp_possible(struct mrsas_mpt_cmd *cmd,
108 bus_dma_segment_t *segs, int nsegs);
109 static void mrsas_build_ieee_sgl(struct mrsas_mpt_cmd *cmd,
110 bus_dma_segment_t *segs, int nseg);
111 static void mrsas_build_prp_nvme(struct mrsas_mpt_cmd *cmd,
112 bus_dma_segment_t *segs, int nseg);
113
114 struct mrsas_mpt_cmd *mrsas_get_mpt_cmd(struct mrsas_softc *sc);
115 MRSAS_REQUEST_DESCRIPTOR_UNION *
116 mrsas_get_request_desc(struct mrsas_softc *sc, u_int16_t index);
117
118 extern int mrsas_reset_targets(struct mrsas_softc *sc);
119 extern u_int16_t MR_TargetIdToLdGet(u_int32_t ldTgtId, MR_DRV_RAID_MAP_ALL * map);
120 extern u_int32_t
121 MR_LdBlockSizeGet(u_int32_t ldTgtId, MR_DRV_RAID_MAP_ALL * map);
122 extern void mrsas_isr(void *arg);
123 extern void mrsas_aen_handler(struct mrsas_softc *sc);
124 extern u_int8_t
125 MR_BuildRaidContext(struct mrsas_softc *sc,
126 struct IO_REQUEST_INFO *io_info, RAID_CONTEXT * pRAID_Context,
127 MR_DRV_RAID_MAP_ALL * map);
128 extern u_int16_t
129 MR_LdSpanArrayGet(u_int32_t ld, u_int32_t span,
130 MR_DRV_RAID_MAP_ALL * map);
131 extern u_int16_t
132 mrsas_get_updated_dev_handle(struct mrsas_softc *sc,
133 PLD_LOAD_BALANCE_INFO lbInfo, struct IO_REQUEST_INFO *io_info);
134 extern int mrsas_complete_cmd(struct mrsas_softc *sc, u_int32_t MSIxIndex);
135 extern MR_LD_RAID *MR_LdRaidGet(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map);
136 extern void mrsas_disable_intr(struct mrsas_softc *sc);
137 extern void mrsas_enable_intr(struct mrsas_softc *sc);
138 void mrsas_prepare_secondRaid1_IO(struct mrsas_softc *sc,
139 struct mrsas_mpt_cmd *cmd);
140
141 /*
142 * mrsas_cam_attach: Main entry to CAM subsystem
143 * input: Adapter instance soft state
144 *
145 * This function is called from mrsas_attach() during initialization to perform
146 * SIM allocations and XPT bus registration. If the kernel version is 7.4 or
147 * earlier, it would also initiate a bus scan.
148 */
149 int
mrsas_cam_attach(struct mrsas_softc * sc)150 mrsas_cam_attach(struct mrsas_softc *sc)
151 {
152 struct cam_devq *devq;
153 int mrsas_cam_depth;
154
155 mrsas_cam_depth = sc->max_scsi_cmds;
156
157 if ((devq = cam_simq_alloc(mrsas_cam_depth)) == NULL) {
158 device_printf(sc->mrsas_dev, "Cannot allocate SIM queue\n");
159 return (ENOMEM);
160 }
161 /*
162 * Create SIM for bus 0 and register, also create path
163 */
164 sc->sim_0 = cam_sim_alloc(mrsas_action, mrsas_cam_poll, "mrsas", sc,
165 device_get_unit(sc->mrsas_dev), &sc->sim_lock, mrsas_cam_depth,
166 mrsas_cam_depth, devq);
167 if (sc->sim_0 == NULL) {
168 cam_simq_free(devq);
169 device_printf(sc->mrsas_dev, "Cannot register SIM\n");
170 return (ENXIO);
171 }
172 /* Initialize taskqueue for Event Handling */
173 TASK_INIT(&sc->ev_task, 0, (void *)mrsas_aen_handler, sc);
174 sc->ev_tq = taskqueue_create("mrsas_taskq", M_NOWAIT | M_ZERO,
175 taskqueue_thread_enqueue, &sc->ev_tq);
176
177 /* Run the task queue with lowest priority */
178 taskqueue_start_threads(&sc->ev_tq, 1, 255, "%s taskq",
179 device_get_nameunit(sc->mrsas_dev));
180 mtx_lock(&sc->sim_lock);
181 if (xpt_bus_register(sc->sim_0, sc->mrsas_dev, 0) != CAM_SUCCESS) {
182 cam_sim_free(sc->sim_0, TRUE); /* passing true frees the devq */
183 mtx_unlock(&sc->sim_lock);
184 return (ENXIO);
185 }
186 if (xpt_create_path(&sc->path_0, NULL, cam_sim_path(sc->sim_0),
187 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
188 xpt_bus_deregister(cam_sim_path(sc->sim_0));
189 cam_sim_free(sc->sim_0, TRUE); /* passing true will free the
190 * devq */
191 mtx_unlock(&sc->sim_lock);
192 return (ENXIO);
193 }
194 mtx_unlock(&sc->sim_lock);
195
196 /*
197 * Create SIM for bus 1 and register, also create path
198 */
199 sc->sim_1 = cam_sim_alloc(mrsas_action, mrsas_cam_poll, "mrsas", sc,
200 device_get_unit(sc->mrsas_dev), &sc->sim_lock, mrsas_cam_depth,
201 mrsas_cam_depth, devq);
202 if (sc->sim_1 == NULL) {
203 cam_simq_free(devq);
204 device_printf(sc->mrsas_dev, "Cannot register SIM\n");
205 return (ENXIO);
206 }
207 mtx_lock(&sc->sim_lock);
208 if (xpt_bus_register(sc->sim_1, sc->mrsas_dev, 1) != CAM_SUCCESS) {
209 cam_sim_free(sc->sim_1, TRUE); /* passing true frees the devq */
210 mtx_unlock(&sc->sim_lock);
211 return (ENXIO);
212 }
213 if (xpt_create_path(&sc->path_1, NULL, cam_sim_path(sc->sim_1),
214 CAM_TARGET_WILDCARD,
215 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
216 xpt_bus_deregister(cam_sim_path(sc->sim_1));
217 cam_sim_free(sc->sim_1, TRUE);
218 mtx_unlock(&sc->sim_lock);
219 return (ENXIO);
220 }
221 mtx_unlock(&sc->sim_lock);
222
223 #if (__FreeBSD_version <= 704000)
224 if (mrsas_bus_scan(sc)) {
225 device_printf(sc->mrsas_dev, "Error in bus scan.\n");
226 return (1);
227 }
228 #endif
229 return (0);
230 }
231
232 /*
233 * mrsas_cam_detach: De-allocates and teardown CAM
234 * input: Adapter instance soft state
235 *
236 * De-registers and frees the paths and SIMs.
237 */
238 void
mrsas_cam_detach(struct mrsas_softc * sc)239 mrsas_cam_detach(struct mrsas_softc *sc)
240 {
241 if (sc->ev_tq != NULL)
242 taskqueue_free(sc->ev_tq);
243 mtx_lock(&sc->sim_lock);
244 if (sc->path_0)
245 xpt_free_path(sc->path_0);
246 if (sc->sim_0) {
247 xpt_bus_deregister(cam_sim_path(sc->sim_0));
248 cam_sim_free(sc->sim_0, FALSE);
249 }
250 if (sc->path_1)
251 xpt_free_path(sc->path_1);
252 if (sc->sim_1) {
253 xpt_bus_deregister(cam_sim_path(sc->sim_1));
254 cam_sim_free(sc->sim_1, TRUE);
255 }
256 mtx_unlock(&sc->sim_lock);
257 }
258
259 /*
260 * mrsas_action: SIM callback entry point
261 * input: pointer to SIM pointer to CAM Control Block
262 *
263 * This function processes CAM subsystem requests. The type of request is stored
264 * in ccb->ccb_h.func_code. The preprocessor #ifdef is necessary because
265 * ccb->cpi.maxio is not supported for FreeBSD version 7.4 or earlier.
266 */
267 static void
mrsas_action(struct cam_sim * sim,union ccb * ccb)268 mrsas_action(struct cam_sim *sim, union ccb *ccb)
269 {
270 struct mrsas_softc *sc = (struct mrsas_softc *)cam_sim_softc(sim);
271 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
272 u_int32_t device_id;
273
274 /*
275 * Check if the system going down
276 * or the adapter is in unrecoverable critical error
277 */
278 if (sc->remove_in_progress ||
279 (sc->adprecovery == MRSAS_HW_CRITICAL_ERROR)) {
280 ccb->ccb_h.status |= CAM_DEV_NOT_THERE;
281 xpt_done(ccb);
282 return;
283 }
284
285 switch (ccb->ccb_h.func_code) {
286 case XPT_SCSI_IO:
287 {
288 device_id = ccb_h->target_id;
289
290 /*
291 * bus 0 is LD, bus 1 is for system-PD
292 */
293 if (cam_sim_bus(sim) == 1 &&
294 sc->pd_list[device_id].driveState != MR_PD_STATE_SYSTEM) {
295 ccb->ccb_h.status |= CAM_DEV_NOT_THERE;
296 xpt_done(ccb);
297 } else {
298 if (mrsas_startio(sc, sim, ccb)) {
299 ccb->ccb_h.status |= CAM_REQ_INVALID;
300 xpt_done(ccb);
301 }
302 }
303 break;
304 }
305 case XPT_ABORT:
306 {
307 ccb->ccb_h.status = CAM_UA_ABORT;
308 xpt_done(ccb);
309 break;
310 }
311 case XPT_RESET_BUS:
312 {
313 xpt_done(ccb);
314 break;
315 }
316 case XPT_GET_TRAN_SETTINGS:
317 {
318 ccb->cts.protocol = PROTO_SCSI;
319 ccb->cts.protocol_version = SCSI_REV_2;
320 ccb->cts.transport = XPORT_SPI;
321 ccb->cts.transport_version = 2;
322 ccb->cts.xport_specific.spi.valid = CTS_SPI_VALID_DISC;
323 ccb->cts.xport_specific.spi.flags = CTS_SPI_FLAGS_DISC_ENB;
324 ccb->cts.proto_specific.scsi.valid = CTS_SCSI_VALID_TQ;
325 ccb->cts.proto_specific.scsi.flags = CTS_SCSI_FLAGS_TAG_ENB;
326 ccb->ccb_h.status = CAM_REQ_CMP;
327 xpt_done(ccb);
328 break;
329 }
330 case XPT_SET_TRAN_SETTINGS:
331 {
332 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
333 xpt_done(ccb);
334 break;
335 }
336 case XPT_CALC_GEOMETRY:
337 {
338 cam_calc_geometry(&ccb->ccg, 1);
339 xpt_done(ccb);
340 break;
341 }
342 case XPT_PATH_INQ:
343 {
344 ccb->cpi.version_num = 1;
345 ccb->cpi.hba_inquiry = 0;
346 ccb->cpi.target_sprt = 0;
347 #if (__FreeBSD_version >= 902001)
348 ccb->cpi.hba_misc = PIM_UNMAPPED;
349 #else
350 ccb->cpi.hba_misc = 0;
351 #endif
352 ccb->cpi.hba_eng_cnt = 0;
353 ccb->cpi.max_lun = MRSAS_SCSI_MAX_LUNS;
354 ccb->cpi.unit_number = cam_sim_unit(sim);
355 ccb->cpi.bus_id = cam_sim_bus(sim);
356 ccb->cpi.initiator_id = MRSAS_SCSI_INITIATOR_ID;
357 ccb->cpi.base_transfer_speed = 150000;
358 strlcpy(ccb->cpi.sim_vid, "FreeBSD", SIM_IDLEN);
359 strlcpy(ccb->cpi.hba_vid, "AVAGO", HBA_IDLEN);
360 strlcpy(ccb->cpi.dev_name, cam_sim_name(sim), DEV_IDLEN);
361 ccb->cpi.transport = XPORT_SPI;
362 ccb->cpi.transport_version = 2;
363 ccb->cpi.protocol = PROTO_SCSI;
364 ccb->cpi.protocol_version = SCSI_REV_2;
365 if (ccb->cpi.bus_id == 0)
366 ccb->cpi.max_target = MRSAS_MAX_PD - 1;
367 else
368 ccb->cpi.max_target = MRSAS_MAX_LD_IDS - 1;
369 #if (__FreeBSD_version > 704000)
370 ccb->cpi.maxio = sc->max_sectors_per_req * 512;
371 #endif
372 ccb->ccb_h.status = CAM_REQ_CMP;
373 xpt_done(ccb);
374 break;
375 }
376 default:
377 {
378 ccb->ccb_h.status = CAM_REQ_INVALID;
379 xpt_done(ccb);
380 break;
381 }
382 }
383 }
384
385 /*
386 * mrsas_scsiio_timeout: Callback function for IO timed out
387 * input: mpt command context
388 *
389 * This function will execute after timeout value provided by ccb header from
390 * CAM layer, if timer expires. Driver will run timer for all DCDM and LDIO
391 * coming from CAM layer. This function is callback function for IO timeout
392 * and it runs in no-sleep context. Set do_timedout_reset in Adapter context
393 * so that it will execute OCR/Kill adpter from ocr_thread context.
394 */
395 static void
mrsas_scsiio_timeout(void * data)396 mrsas_scsiio_timeout(void *data)
397 {
398 struct mrsas_mpt_cmd *cmd;
399 struct mrsas_softc *sc;
400 u_int32_t target_id;
401
402 if (!data)
403 return;
404
405 cmd = (struct mrsas_mpt_cmd *)data;
406 sc = cmd->sc;
407
408 if (cmd->ccb_ptr == NULL) {
409 printf("command timeout with NULL ccb\n");
410 return;
411 }
412
413 /*
414 * Below callout is dummy entry so that it will be cancelled from
415 * mrsas_cmd_done(). Now Controller will go to OCR/Kill Adapter based
416 * on OCR enable/disable property of Controller from ocr_thread
417 * context.
418 */
419 #if (__FreeBSD_version >= 1000510)
420 callout_reset_sbt(&cmd->cm_callout, SBT_1S * 180, 0,
421 mrsas_scsiio_timeout, cmd, 0);
422 #else
423 callout_reset(&cmd->cm_callout, (180000 * hz) / 1000,
424 mrsas_scsiio_timeout, cmd);
425 #endif
426
427 if (cmd->ccb_ptr->cpi.bus_id == 0)
428 target_id = cmd->ccb_ptr->ccb_h.target_id;
429 else
430 target_id = (cmd->ccb_ptr->ccb_h.target_id + (MRSAS_MAX_PD - 1));
431
432 /* Save the cmd to be processed for TM, if it is not there in the array */
433 if (sc->target_reset_pool[target_id] == NULL) {
434 sc->target_reset_pool[target_id] = cmd;
435 mrsas_atomic_inc(&sc->target_reset_outstanding);
436 }
437
438 return;
439 }
440
441 /*
442 * mrsas_startio: SCSI IO entry point
443 * input: Adapter instance soft state
444 * pointer to CAM Control Block
445 *
446 * This function is the SCSI IO entry point and it initiates IO processing. It
447 * copies the IO and depending if the IO is read/write or inquiry, it would
448 * call mrsas_build_ldio() or mrsas_build_dcdb(), respectively. It returns 0
449 * if the command is sent to firmware successfully, otherwise it returns 1.
450 */
451 static int32_t
mrsas_startio(struct mrsas_softc * sc,struct cam_sim * sim,union ccb * ccb)452 mrsas_startio(struct mrsas_softc *sc, struct cam_sim *sim,
453 union ccb *ccb)
454 {
455 struct mrsas_mpt_cmd *cmd, *r1_cmd = NULL;
456 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
457 struct ccb_scsiio *csio = &(ccb->csio);
458 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc;
459 u_int8_t cmd_type;
460
461 if ((csio->cdb_io.cdb_bytes[0]) == SYNCHRONIZE_CACHE &&
462 (!sc->fw_sync_cache_support)) {
463 ccb->ccb_h.status = CAM_REQ_CMP;
464 xpt_done(ccb);
465 return (0);
466 }
467 ccb_h->status |= CAM_SIM_QUEUED;
468
469 if (mrsas_atomic_inc_return(&sc->fw_outstanding) > sc->max_scsi_cmds) {
470 ccb_h->status |= CAM_REQUEUE_REQ;
471 xpt_done(ccb);
472 mrsas_atomic_dec(&sc->fw_outstanding);
473 return (0);
474 }
475
476 cmd = mrsas_get_mpt_cmd(sc);
477
478 if (!cmd) {
479 ccb_h->status |= CAM_REQUEUE_REQ;
480 xpt_done(ccb);
481 mrsas_atomic_dec(&sc->fw_outstanding);
482 return (0);
483 }
484
485 if ((ccb_h->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
486 if (ccb_h->flags & CAM_DIR_IN)
487 cmd->flags |= MRSAS_DIR_IN;
488 if (ccb_h->flags & CAM_DIR_OUT)
489 cmd->flags |= MRSAS_DIR_OUT;
490 } else
491 cmd->flags = MRSAS_DIR_NONE; /* no data */
492
493 /* For FreeBSD 9.2 and higher */
494 #if (__FreeBSD_version >= 902001)
495 /*
496 * XXX We don't yet support physical addresses here.
497 */
498 switch ((ccb->ccb_h.flags & CAM_DATA_MASK)) {
499 case CAM_DATA_PADDR:
500 case CAM_DATA_SG_PADDR:
501 device_printf(sc->mrsas_dev, "%s: physical addresses not supported\n",
502 __func__);
503 mrsas_release_mpt_cmd(cmd);
504 ccb_h->status = CAM_REQ_INVALID;
505 ccb_h->status &= ~CAM_SIM_QUEUED;
506 goto done;
507 case CAM_DATA_SG:
508 device_printf(sc->mrsas_dev, "%s: scatter gather is not supported\n",
509 __func__);
510 mrsas_release_mpt_cmd(cmd);
511 ccb_h->status = CAM_REQ_INVALID;
512 goto done;
513 case CAM_DATA_VADDR:
514 cmd->length = csio->dxfer_len;
515 if (cmd->length)
516 cmd->data = csio->data_ptr;
517 break;
518 case CAM_DATA_BIO:
519 cmd->length = csio->dxfer_len;
520 if (cmd->length)
521 cmd->data = csio->data_ptr;
522 break;
523 default:
524 ccb->ccb_h.status = CAM_REQ_INVALID;
525 goto done;
526 }
527 #else
528 if (!(ccb_h->flags & CAM_DATA_PHYS)) { /* Virtual data address */
529 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
530 cmd->length = csio->dxfer_len;
531 if (cmd->length)
532 cmd->data = csio->data_ptr;
533 } else {
534 mrsas_release_mpt_cmd(cmd);
535 ccb_h->status = CAM_REQ_INVALID;
536 goto done;
537 }
538 } else { /* Data addresses are physical. */
539 mrsas_release_mpt_cmd(cmd);
540 ccb_h->status = CAM_REQ_INVALID;
541 ccb_h->status &= ~CAM_SIM_QUEUED;
542 goto done;
543 }
544 #endif
545 /* save ccb ptr */
546 cmd->ccb_ptr = ccb;
547
548 req_desc = mrsas_get_request_desc(sc, (cmd->index) - 1);
549 if (!req_desc) {
550 device_printf(sc->mrsas_dev, "Cannot get request_descriptor.\n");
551 return (FAIL);
552 }
553 memset(req_desc, 0, sizeof(MRSAS_REQUEST_DESCRIPTOR_UNION));
554 cmd->request_desc = req_desc;
555
556 if (ccb_h->flags & CAM_CDB_POINTER)
557 bcopy(csio->cdb_io.cdb_ptr, cmd->io_request->CDB.CDB32, csio->cdb_len);
558 else
559 bcopy(csio->cdb_io.cdb_bytes, cmd->io_request->CDB.CDB32, csio->cdb_len);
560 mtx_lock(&sc->raidmap_lock);
561
562 /* Check for IO type READ-WRITE targeted for Logical Volume */
563 cmd_type = mrsas_find_io_type(sim, ccb);
564 switch (cmd_type) {
565 case READ_WRITE_LDIO:
566 /* Build READ-WRITE IO for Logical Volume */
567 if (mrsas_build_ldio_rw(sc, cmd, ccb)) {
568 device_printf(sc->mrsas_dev, "Build RW LDIO failed.\n");
569 mtx_unlock(&sc->raidmap_lock);
570 mrsas_release_mpt_cmd(cmd);
571 return (1);
572 }
573 break;
574 case NON_READ_WRITE_LDIO:
575 /* Build NON READ-WRITE IO for Logical Volume */
576 if (mrsas_build_ldio_nonrw(sc, cmd, ccb)) {
577 device_printf(sc->mrsas_dev, "Build NON-RW LDIO failed.\n");
578 mtx_unlock(&sc->raidmap_lock);
579 mrsas_release_mpt_cmd(cmd);
580 return (1);
581 }
582 break;
583 case READ_WRITE_SYSPDIO:
584 case NON_READ_WRITE_SYSPDIO:
585 if (sc->secure_jbod_support &&
586 (cmd_type == NON_READ_WRITE_SYSPDIO)) {
587 /* Build NON-RW IO for JBOD */
588 if (mrsas_build_syspdio(sc, cmd, ccb, sim, 0)) {
589 device_printf(sc->mrsas_dev,
590 "Build SYSPDIO failed.\n");
591 mtx_unlock(&sc->raidmap_lock);
592 mrsas_release_mpt_cmd(cmd);
593 return (1);
594 }
595 } else {
596 /* Build RW IO for JBOD */
597 if (mrsas_build_syspdio(sc, cmd, ccb, sim, 1)) {
598 device_printf(sc->mrsas_dev,
599 "Build SYSPDIO failed.\n");
600 mtx_unlock(&sc->raidmap_lock);
601 mrsas_release_mpt_cmd(cmd);
602 return (1);
603 }
604 }
605 }
606 mtx_unlock(&sc->raidmap_lock);
607
608 if (cmd->flags == MRSAS_DIR_IN) /* from device */
609 cmd->io_request->Control |= htole32(MPI2_SCSIIO_CONTROL_READ);
610 else if (cmd->flags == MRSAS_DIR_OUT) /* to device */
611 cmd->io_request->Control |= htole32(MPI2_SCSIIO_CONTROL_WRITE);
612
613 cmd->io_request->SGLFlags = htole16(MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
614 cmd->io_request->SGLOffset0 = offsetof(MRSAS_RAID_SCSI_IO_REQUEST, SGL) / 4;
615 cmd->io_request->SenseBufferLowAddress = htole32(cmd->sense_phys_addr & 0xFFFFFFFF);
616 cmd->io_request->SenseBufferLength = MRSAS_SCSI_SENSE_BUFFERSIZE;
617
618 req_desc = cmd->request_desc;
619 req_desc->SCSIIO.SMID = htole16(cmd->index);
620
621 /*
622 * Start timer for IO timeout. Default timeout value is 90 second.
623 */
624 cmd->callout_owner = true;
625 #if (__FreeBSD_version >= 1000510)
626 callout_reset_sbt(&cmd->cm_callout, SBT_1S * 180, 0,
627 mrsas_scsiio_timeout, cmd, 0);
628 #else
629 callout_reset(&cmd->cm_callout, (180000 * hz) / 1000,
630 mrsas_scsiio_timeout, cmd);
631 #endif
632
633 if (mrsas_atomic_read(&sc->fw_outstanding) > sc->io_cmds_highwater)
634 sc->io_cmds_highwater++;
635
636 /*
637 * if it is raid 1/10 fp write capable.
638 * try to get second command from pool and construct it.
639 * From FW, it has confirmed that lba values of two PDs corresponds to
640 * single R1/10 LD are always same
641 *
642 */
643 /*
644 * driver side count always should be less than max_fw_cmds to get
645 * new command
646 */
647 if (cmd->r1_alt_dev_handle != MR_DEVHANDLE_INVALID) {
648 mrsas_prepare_secondRaid1_IO(sc, cmd);
649 mrsas_fire_cmd(sc, req_desc->addr.u.low,
650 req_desc->addr.u.high);
651 r1_cmd = cmd->peer_cmd;
652 mrsas_fire_cmd(sc, r1_cmd->request_desc->addr.u.low,
653 r1_cmd->request_desc->addr.u.high);
654 } else {
655 mrsas_fire_cmd(sc, req_desc->addr.u.low,
656 req_desc->addr.u.high);
657 }
658
659 return (0);
660
661 done:
662 xpt_done(ccb);
663 mrsas_atomic_dec(&sc->fw_outstanding);
664 return (0);
665 }
666
667 /*
668 * mrsas_find_io_type: Determines if IO is read/write or inquiry
669 * input: pointer to CAM Control Block
670 *
671 * This function determines if the IO is read/write or inquiry. It returns a 1
672 * if the IO is read/write and 0 if it is inquiry.
673 */
674 int
mrsas_find_io_type(struct cam_sim * sim,union ccb * ccb)675 mrsas_find_io_type(struct cam_sim *sim, union ccb *ccb)
676 {
677 struct ccb_scsiio *csio = &(ccb->csio);
678
679 switch (csio->cdb_io.cdb_bytes[0]) {
680 case READ_10:
681 case WRITE_10:
682 case READ_12:
683 case WRITE_12:
684 case READ_6:
685 case WRITE_6:
686 case READ_16:
687 case WRITE_16:
688 return (cam_sim_bus(sim) ?
689 READ_WRITE_SYSPDIO : READ_WRITE_LDIO);
690 default:
691 return (cam_sim_bus(sim) ?
692 NON_READ_WRITE_SYSPDIO : NON_READ_WRITE_LDIO);
693 }
694 }
695
696 /*
697 * mrsas_get_mpt_cmd: Get a cmd from free command pool
698 * input: Adapter instance soft state
699 *
700 * This function removes an MPT command from the command free list and
701 * initializes it.
702 */
703 struct mrsas_mpt_cmd *
mrsas_get_mpt_cmd(struct mrsas_softc * sc)704 mrsas_get_mpt_cmd(struct mrsas_softc *sc)
705 {
706 struct mrsas_mpt_cmd *cmd = NULL;
707
708 mtx_lock(&sc->mpt_cmd_pool_lock);
709 if (!TAILQ_EMPTY(&sc->mrsas_mpt_cmd_list_head)) {
710 cmd = TAILQ_FIRST(&sc->mrsas_mpt_cmd_list_head);
711 TAILQ_REMOVE(&sc->mrsas_mpt_cmd_list_head, cmd, next);
712 } else {
713 goto out;
714 }
715
716 memset((uint8_t *)cmd->io_request, 0, MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE);
717 cmd->data = NULL;
718 cmd->length = 0;
719 cmd->flags = 0;
720 cmd->error_code = 0;
721 cmd->load_balance = 0;
722 cmd->ccb_ptr = NULL;
723 out:
724 mtx_unlock(&sc->mpt_cmd_pool_lock);
725 return cmd;
726 }
727
728 /*
729 * mrsas_release_mpt_cmd: Return a cmd to free command pool
730 * input: Command packet for return to free command pool
731 *
732 * This function returns an MPT command to the free command list.
733 */
734 void
mrsas_release_mpt_cmd(struct mrsas_mpt_cmd * cmd)735 mrsas_release_mpt_cmd(struct mrsas_mpt_cmd *cmd)
736 {
737 struct mrsas_softc *sc = cmd->sc;
738
739 mtx_lock(&sc->mpt_cmd_pool_lock);
740 cmd->r1_alt_dev_handle = MR_DEVHANDLE_INVALID;
741 cmd->sync_cmd_idx = (u_int32_t)MRSAS_ULONG_MAX;
742 cmd->peer_cmd = NULL;
743 cmd->cmd_completed = 0;
744 memset((uint8_t *)cmd->io_request, 0,
745 sizeof(MRSAS_RAID_SCSI_IO_REQUEST));
746 TAILQ_INSERT_HEAD(&(sc->mrsas_mpt_cmd_list_head), cmd, next);
747 mtx_unlock(&sc->mpt_cmd_pool_lock);
748
749 return;
750 }
751
752 /*
753 * mrsas_get_request_desc: Get request descriptor from array
754 * input: Adapter instance soft state
755 * SMID index
756 *
757 * This function returns a pointer to the request descriptor.
758 */
759 MRSAS_REQUEST_DESCRIPTOR_UNION *
mrsas_get_request_desc(struct mrsas_softc * sc,u_int16_t index)760 mrsas_get_request_desc(struct mrsas_softc *sc, u_int16_t index)
761 {
762 u_int8_t *p;
763
764 KASSERT(index < sc->max_fw_cmds, ("req_desc is out of range"));
765 p = sc->req_desc + sizeof(MRSAS_REQUEST_DESCRIPTOR_UNION) * index;
766
767 return (MRSAS_REQUEST_DESCRIPTOR_UNION *) p;
768 }
769
770 /* mrsas_prepare_secondRaid1_IO
771 * It prepares the raid 1 second IO
772 */
773 void
mrsas_prepare_secondRaid1_IO(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd)774 mrsas_prepare_secondRaid1_IO(struct mrsas_softc *sc,
775 struct mrsas_mpt_cmd *cmd)
776 {
777 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc, *req_desc2 = NULL;
778 struct mrsas_mpt_cmd *r1_cmd;
779
780 r1_cmd = cmd->peer_cmd;
781 req_desc = cmd->request_desc;
782
783 /*
784 * copy the io request frame as well as 8 SGEs data for r1
785 * command
786 */
787 memcpy(r1_cmd->io_request, cmd->io_request,
788 (sizeof(MRSAS_RAID_SCSI_IO_REQUEST)));
789 memcpy(&r1_cmd->io_request->SGL, &cmd->io_request->SGL,
790 (sc->max_sge_in_main_msg * sizeof(MPI2_SGE_IO_UNION)));
791
792 /* sense buffer is different for r1 command */
793 r1_cmd->io_request->SenseBufferLowAddress = htole32(r1_cmd->sense_phys_addr & 0xFFFFFFFF);
794 r1_cmd->ccb_ptr = cmd->ccb_ptr;
795
796 req_desc2 = mrsas_get_request_desc(sc, r1_cmd->index - 1);
797 req_desc2->addr.Words = 0;
798 r1_cmd->request_desc = req_desc2;
799 req_desc2->SCSIIO.SMID = r1_cmd->index;
800 req_desc2->SCSIIO.RequestFlags = req_desc->SCSIIO.RequestFlags;
801 r1_cmd->request_desc->SCSIIO.DevHandle = cmd->r1_alt_dev_handle;
802 r1_cmd->r1_alt_dev_handle = cmd->io_request->DevHandle;
803 r1_cmd->io_request->DevHandle = cmd->r1_alt_dev_handle;
804 cmd->io_request->RaidContext.raid_context_g35.smid.peerSMID =
805 r1_cmd->index;
806 r1_cmd->io_request->RaidContext.raid_context_g35.smid.peerSMID =
807 cmd->index;
808 /*
809 * MSIxIndex of both commands request descriptors
810 * should be same
811 */
812 r1_cmd->request_desc->SCSIIO.MSIxIndex = cmd->request_desc->SCSIIO.MSIxIndex;
813 /* span arm is different for r1 cmd */
814 r1_cmd->io_request->RaidContext.raid_context_g35.spanArm =
815 cmd->io_request->RaidContext.raid_context_g35.spanArm + 1;
816
817 }
818
819 /*
820 * mrsas_build_ldio_rw: Builds an LDIO command
821 * input: Adapter instance soft state
822 * Pointer to command packet
823 * Pointer to CCB
824 *
825 * This function builds the LDIO command packet. It returns 0 if the command is
826 * built successfully, otherwise it returns a 1.
827 */
828 int
mrsas_build_ldio_rw(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb)829 mrsas_build_ldio_rw(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
830 union ccb *ccb)
831 {
832 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
833 struct ccb_scsiio *csio = &(ccb->csio);
834 u_int32_t device_id;
835 MRSAS_RAID_SCSI_IO_REQUEST *io_request;
836
837 device_id = ccb_h->target_id;
838
839 io_request = cmd->io_request;
840 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
841 io_request->RaidContext.raid_context.status = 0;
842 io_request->RaidContext.raid_context.exStatus = 0;
843
844 /* just the cdb len, other flags zero, and ORed-in later for FP */
845 io_request->IoFlags = htole16(csio->cdb_len);
846
847 if (mrsas_setup_io(sc, cmd, ccb, device_id, io_request) != SUCCESS)
848 device_printf(sc->mrsas_dev, "Build ldio or fpio error\n");
849
850 io_request->DataLength = htole32(cmd->length);
851
852 if (mrsas_map_request(sc, cmd, ccb) == SUCCESS) {
853 if (sc->is_ventura || sc->is_aero)
854 io_request->RaidContext.raid_context_g35.numSGE = cmd->sge_count;
855 else {
856 /*
857 * numSGE store lower 8 bit of sge_count. numSGEExt store
858 * higher 8 bit of sge_count
859 */
860 io_request->RaidContext.raid_context.numSGE = cmd->sge_count;
861 io_request->RaidContext.raid_context.numSGEExt = (uint8_t)(cmd->sge_count >> 8);
862 }
863
864 } else {
865 device_printf(sc->mrsas_dev, "Data map/load failed.\n");
866 return (FAIL);
867 }
868 return (0);
869 }
870
871 /* stream detection on read and and write IOs */
872 static void
mrsas_stream_detect(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,struct IO_REQUEST_INFO * io_info)873 mrsas_stream_detect(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
874 struct IO_REQUEST_INFO *io_info)
875 {
876 u_int32_t device_id = io_info->ldTgtId;
877 LD_STREAM_DETECT *current_ld_SD = sc->streamDetectByLD[device_id];
878 u_int32_t *track_stream = ¤t_ld_SD->mruBitMap;
879 u_int32_t streamNum, shiftedValues, unshiftedValues;
880 u_int32_t indexValueMask, shiftedValuesMask;
881 int i;
882 boolean_t isReadAhead = false;
883 STREAM_DETECT *current_SD;
884
885 /* find possible stream */
886 for (i = 0; i < MAX_STREAMS_TRACKED; ++i) {
887 streamNum = (*track_stream >> (i * BITS_PER_INDEX_STREAM)) &
888 STREAM_MASK;
889 current_SD = ¤t_ld_SD->streamTrack[streamNum];
890 /*
891 * if we found a stream, update the raid context and
892 * also update the mruBitMap
893 */
894 if (current_SD->nextSeqLBA &&
895 io_info->ldStartBlock >= current_SD->nextSeqLBA &&
896 (io_info->ldStartBlock <= (current_SD->nextSeqLBA+32)) &&
897 (current_SD->isRead == io_info->isRead)) {
898 if (io_info->ldStartBlock != current_SD->nextSeqLBA &&
899 (!io_info->isRead || !isReadAhead)) {
900 /*
901 * Once the API availible we need to change this.
902 * At this point we are not allowing any gap
903 */
904 continue;
905 }
906 cmd->io_request->RaidContext.raid_context_g35.streamDetected = TRUE;
907 current_SD->nextSeqLBA = io_info->ldStartBlock + io_info->numBlocks;
908 /*
909 * update the mruBitMap LRU
910 */
911 shiftedValuesMask = (1 << i * BITS_PER_INDEX_STREAM) - 1 ;
912 shiftedValues = ((*track_stream & shiftedValuesMask) <<
913 BITS_PER_INDEX_STREAM);
914 indexValueMask = STREAM_MASK << i * BITS_PER_INDEX_STREAM;
915 unshiftedValues = (*track_stream) &
916 (~(shiftedValuesMask | indexValueMask));
917 *track_stream =
918 (unshiftedValues | shiftedValues | streamNum);
919 return;
920 }
921 }
922 /*
923 * if we did not find any stream, create a new one from the least recently used
924 */
925 streamNum = (*track_stream >>
926 ((MAX_STREAMS_TRACKED - 1) * BITS_PER_INDEX_STREAM)) & STREAM_MASK;
927 current_SD = ¤t_ld_SD->streamTrack[streamNum];
928 current_SD->isRead = io_info->isRead;
929 current_SD->nextSeqLBA = io_info->ldStartBlock + io_info->numBlocks;
930 *track_stream = (((*track_stream & ZERO_LAST_STREAM) << 4) | streamNum);
931 return;
932 }
933
934 /*
935 * mrsas_setup_io: Set up data including Fast Path I/O
936 * input: Adapter instance soft state
937 * Pointer to command packet
938 * Pointer to CCB
939 *
940 * This function builds the DCDB inquiry command. It returns 0 if the command
941 * is built successfully, otherwise it returns a 1.
942 */
943 int
mrsas_setup_io(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb,u_int32_t device_id,MRSAS_RAID_SCSI_IO_REQUEST * io_request)944 mrsas_setup_io(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
945 union ccb *ccb, u_int32_t device_id,
946 MRSAS_RAID_SCSI_IO_REQUEST * io_request)
947 {
948 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
949 struct ccb_scsiio *csio = &(ccb->csio);
950 struct IO_REQUEST_INFO io_info;
951 MR_DRV_RAID_MAP_ALL *map_ptr;
952 struct mrsas_mpt_cmd *r1_cmd = NULL;
953
954 MR_LD_RAID *raid;
955 u_int8_t fp_possible;
956 u_int32_t start_lba_hi, start_lba_lo, ld_block_size, ld;
957 u_int32_t datalength = 0;
958
959 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
960
961 start_lba_lo = 0;
962 start_lba_hi = 0;
963 fp_possible = 0;
964
965 /*
966 * READ_6 (0x08) or WRITE_6 (0x0A) cdb
967 */
968 if (csio->cdb_len == 6) {
969 datalength = (u_int32_t)csio->cdb_io.cdb_bytes[4];
970 start_lba_lo = ((u_int32_t)csio->cdb_io.cdb_bytes[1] << 16) |
971 ((u_int32_t)csio->cdb_io.cdb_bytes[2] << 8) |
972 (u_int32_t)csio->cdb_io.cdb_bytes[3];
973 start_lba_lo &= 0x1FFFFF;
974 }
975 /*
976 * READ_10 (0x28) or WRITE_6 (0x2A) cdb
977 */
978 else if (csio->cdb_len == 10) {
979 datalength = (u_int32_t)csio->cdb_io.cdb_bytes[8] |
980 ((u_int32_t)csio->cdb_io.cdb_bytes[7] << 8);
981 start_lba_lo = ((u_int32_t)csio->cdb_io.cdb_bytes[2] << 24) |
982 ((u_int32_t)csio->cdb_io.cdb_bytes[3] << 16) |
983 (u_int32_t)csio->cdb_io.cdb_bytes[4] << 8 |
984 ((u_int32_t)csio->cdb_io.cdb_bytes[5]);
985 }
986 /*
987 * READ_12 (0xA8) or WRITE_12 (0xAA) cdb
988 */
989 else if (csio->cdb_len == 12) {
990 datalength = (u_int32_t)csio->cdb_io.cdb_bytes[6] << 24 |
991 ((u_int32_t)csio->cdb_io.cdb_bytes[7] << 16) |
992 ((u_int32_t)csio->cdb_io.cdb_bytes[8] << 8) |
993 ((u_int32_t)csio->cdb_io.cdb_bytes[9]);
994 start_lba_lo = ((u_int32_t)csio->cdb_io.cdb_bytes[2] << 24) |
995 ((u_int32_t)csio->cdb_io.cdb_bytes[3] << 16) |
996 (u_int32_t)csio->cdb_io.cdb_bytes[4] << 8 |
997 ((u_int32_t)csio->cdb_io.cdb_bytes[5]);
998 }
999 /*
1000 * READ_16 (0x88) or WRITE_16 (0xx8A) cdb
1001 */
1002 else if (csio->cdb_len == 16) {
1003 datalength = (u_int32_t)csio->cdb_io.cdb_bytes[10] << 24 |
1004 ((u_int32_t)csio->cdb_io.cdb_bytes[11] << 16) |
1005 ((u_int32_t)csio->cdb_io.cdb_bytes[12] << 8) |
1006 ((u_int32_t)csio->cdb_io.cdb_bytes[13]);
1007 start_lba_lo = ((u_int32_t)csio->cdb_io.cdb_bytes[6] << 24) |
1008 ((u_int32_t)csio->cdb_io.cdb_bytes[7] << 16) |
1009 (u_int32_t)csio->cdb_io.cdb_bytes[8] << 8 |
1010 ((u_int32_t)csio->cdb_io.cdb_bytes[9]);
1011 start_lba_hi = ((u_int32_t)csio->cdb_io.cdb_bytes[2] << 24) |
1012 ((u_int32_t)csio->cdb_io.cdb_bytes[3] << 16) |
1013 (u_int32_t)csio->cdb_io.cdb_bytes[4] << 8 |
1014 ((u_int32_t)csio->cdb_io.cdb_bytes[5]);
1015 }
1016 memset(&io_info, 0, sizeof(struct IO_REQUEST_INFO));
1017 io_info.ldStartBlock = ((u_int64_t)start_lba_hi << 32) | start_lba_lo;
1018 io_info.numBlocks = datalength;
1019 io_info.ldTgtId = device_id;
1020 io_info.r1_alt_dev_handle = MR_DEVHANDLE_INVALID;
1021
1022 io_request->DataLength = htole32(cmd->length);
1023
1024 switch (ccb_h->flags & CAM_DIR_MASK) {
1025 case CAM_DIR_IN:
1026 io_info.isRead = 1;
1027 break;
1028 case CAM_DIR_OUT:
1029 io_info.isRead = 0;
1030 break;
1031 case CAM_DIR_NONE:
1032 default:
1033 mrsas_dprint(sc, MRSAS_TRACE, "From %s : DMA Flag is %d \n", __func__, ccb_h->flags & CAM_DIR_MASK);
1034 break;
1035 }
1036
1037 map_ptr = sc->ld_drv_map[(sc->map_id & 1)];
1038 ld_block_size = MR_LdBlockSizeGet(device_id, map_ptr);
1039
1040 ld = MR_TargetIdToLdGet(device_id, map_ptr);
1041 if ((ld >= MAX_LOGICAL_DRIVES_EXT) || (!sc->fast_path_io)) {
1042 io_request->RaidContext.raid_context.regLockFlags = 0;
1043 fp_possible = 0;
1044 } else {
1045 if (MR_BuildRaidContext(sc, &io_info, &io_request->RaidContext.raid_context, map_ptr))
1046 fp_possible = io_info.fpOkForIo;
1047 }
1048
1049 raid = MR_LdRaidGet(ld, map_ptr);
1050 /* Store the TM capability value in cmd */
1051 cmd->tmCapable = raid->capability.tmCapable;
1052
1053 cmd->request_desc->SCSIIO.MSIxIndex =
1054 sc->msix_vectors ? smp_processor_id() % sc->msix_vectors : 0;
1055
1056 if (sc->is_ventura || sc->is_aero) {
1057 if (sc->streamDetectByLD) {
1058 mtx_lock(&sc->stream_lock);
1059 mrsas_stream_detect(sc, cmd, &io_info);
1060 mtx_unlock(&sc->stream_lock);
1061 /* In ventura if stream detected for a read and
1062 * it is read ahead capable make this IO as LDIO */
1063 if (io_request->RaidContext.raid_context_g35.streamDetected &&
1064 io_info.isRead && io_info.raCapable)
1065 fp_possible = FALSE;
1066 }
1067
1068 /* Set raid 1/10 fast path write capable bit in io_info.
1069 * Note - reset peer_cmd and r1_alt_dev_handle if fp_possible
1070 * disabled after this point. Try not to add more check for
1071 * fp_possible toggle after this.
1072 */
1073 if (fp_possible &&
1074 (io_info.r1_alt_dev_handle != MR_DEVHANDLE_INVALID) &&
1075 (raid->level == 1) && !io_info.isRead) {
1076 if (mrsas_atomic_inc_return(&sc->fw_outstanding) > sc->max_scsi_cmds) {
1077 fp_possible = FALSE;
1078 mrsas_atomic_dec(&sc->fw_outstanding);
1079 } else {
1080 r1_cmd = mrsas_get_mpt_cmd(sc);
1081 if (!r1_cmd) {
1082 fp_possible = FALSE;
1083 mrsas_atomic_dec(&sc->fw_outstanding);
1084 }
1085 else {
1086 cmd->peer_cmd = r1_cmd;
1087 r1_cmd->peer_cmd = cmd;
1088 }
1089 }
1090 }
1091 }
1092
1093 if (fp_possible) {
1094 mrsas_set_pd_lba(io_request, csio->cdb_len, &io_info, ccb, map_ptr,
1095 start_lba_lo, ld_block_size);
1096 io_request->Function = MPI2_FUNCTION_SCSI_IO_REQUEST;
1097 cmd->request_desc->SCSIIO.RequestFlags =
1098 (MPI2_REQ_DESCRIPT_FLAGS_FP_IO <<
1099 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1100 if (sc->mrsas_gen3_ctrl) {
1101 if (io_request->RaidContext.raid_context.regLockFlags == REGION_TYPE_UNUSED)
1102 cmd->request_desc->SCSIIO.RequestFlags =
1103 (MRSAS_REQ_DESCRIPT_FLAGS_NO_LOCK <<
1104 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1105 io_request->RaidContext.raid_context.Type = MPI2_TYPE_CUDA;
1106 io_request->RaidContext.raid_context.nseg = 0x1;
1107 io_request->IoFlags |= htole16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
1108 io_request->RaidContext.raid_context.regLockFlags |=
1109 (MR_RL_FLAGS_GRANT_DESTINATION_CUDA |
1110 MR_RL_FLAGS_SEQ_NUM_ENABLE);
1111 } else if (sc->is_ventura || sc->is_aero) {
1112 io_request->RaidContext.raid_context_g35.Type = MPI2_TYPE_CUDA;
1113 io_request->RaidContext.raid_context_g35.nseg = 0x1;
1114 io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
1115 io_request->IoFlags |= htole16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
1116 if (io_request->RaidContext.raid_context_g35.routingFlags.bits.sld) {
1117 io_request->RaidContext.raid_context_g35.RAIDFlags =
1118 (MR_RAID_FLAGS_IO_SUB_TYPE_CACHE_BYPASS
1119 << MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT);
1120 }
1121 }
1122 if ((sc->load_balance_info[device_id].loadBalanceFlag) &&
1123 (io_info.isRead)) {
1124 io_info.devHandle =
1125 mrsas_get_updated_dev_handle(sc,
1126 &sc->load_balance_info[device_id], &io_info);
1127 cmd->load_balance = MRSAS_LOAD_BALANCE_FLAG;
1128 cmd->pd_r1_lb = io_info.pd_after_lb;
1129 if (sc->is_ventura || sc->is_aero)
1130 io_request->RaidContext.raid_context_g35.spanArm = io_info.span_arm;
1131 else
1132 io_request->RaidContext.raid_context.spanArm = io_info.span_arm;
1133 } else
1134 cmd->load_balance = 0;
1135
1136 if (sc->is_ventura || sc->is_aero)
1137 cmd->r1_alt_dev_handle = io_info.r1_alt_dev_handle;
1138 else
1139 cmd->r1_alt_dev_handle = MR_DEVHANDLE_INVALID;
1140
1141 cmd->request_desc->SCSIIO.DevHandle = io_info.devHandle;
1142 io_request->DevHandle = io_info.devHandle;
1143 cmd->pdInterface = io_info.pdInterface;
1144 } else {
1145 /* Not FP IO */
1146 io_request->RaidContext.raid_context.timeoutValue = htole16(map_ptr->raidMap.fpPdIoTimeoutSec);
1147 cmd->request_desc->SCSIIO.RequestFlags =
1148 (MRSAS_REQ_DESCRIPT_FLAGS_LD_IO <<
1149 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1150 if (sc->mrsas_gen3_ctrl) {
1151 if (io_request->RaidContext.raid_context.regLockFlags == REGION_TYPE_UNUSED)
1152 cmd->request_desc->SCSIIO.RequestFlags =
1153 (MRSAS_REQ_DESCRIPT_FLAGS_NO_LOCK <<
1154 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1155 io_request->RaidContext.raid_context.Type = MPI2_TYPE_CUDA;
1156 io_request->RaidContext.raid_context.regLockFlags |=
1157 (MR_RL_FLAGS_GRANT_DESTINATION_CPU0 |
1158 MR_RL_FLAGS_SEQ_NUM_ENABLE);
1159 io_request->RaidContext.raid_context.nseg = 0x1;
1160 } else if (sc->is_ventura || sc->is_aero) {
1161 io_request->RaidContext.raid_context_g35.Type = MPI2_TYPE_CUDA;
1162 io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
1163 io_request->RaidContext.raid_context_g35.nseg = 0x1;
1164 }
1165 io_request->Function = MRSAS_MPI2_FUNCTION_LD_IO_REQUEST;
1166 io_request->DevHandle = htole16(device_id);
1167 }
1168 return (0);
1169 }
1170
1171 /*
1172 * mrsas_build_ldio_nonrw: Builds an LDIO command
1173 * input: Adapter instance soft state
1174 * Pointer to command packet
1175 * Pointer to CCB
1176 *
1177 * This function builds the LDIO command packet. It returns 0 if the command is
1178 * built successfully, otherwise it returns a 1.
1179 */
1180 int
mrsas_build_ldio_nonrw(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb)1181 mrsas_build_ldio_nonrw(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
1182 union ccb *ccb)
1183 {
1184 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
1185 u_int32_t device_id, ld;
1186 MR_DRV_RAID_MAP_ALL *map_ptr;
1187 MR_LD_RAID *raid;
1188 RAID_CONTEXT *pRAID_Context;
1189 MRSAS_RAID_SCSI_IO_REQUEST *io_request;
1190
1191 io_request = cmd->io_request;
1192 device_id = ccb_h->target_id;
1193
1194 map_ptr = sc->ld_drv_map[(sc->map_id & 1)];
1195 ld = MR_TargetIdToLdGet(device_id, map_ptr);
1196 raid = MR_LdRaidGet(ld, map_ptr);
1197 /* get RAID_Context pointer */
1198 pRAID_Context = &io_request->RaidContext.raid_context;
1199 /* Store the TM capability value in cmd */
1200 cmd->tmCapable = raid->capability.tmCapable;
1201
1202 /* FW path for LD Non-RW (SCSI management commands) */
1203 io_request->Function = MRSAS_MPI2_FUNCTION_LD_IO_REQUEST;
1204 io_request->DevHandle = device_id;
1205 cmd->request_desc->SCSIIO.RequestFlags =
1206 (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO <<
1207 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1208
1209 io_request->RaidContext.raid_context.VirtualDiskTgtId = device_id;
1210 io_request->LUN[1] = ccb_h->target_lun & 0xF;
1211 io_request->DataLength = cmd->length;
1212
1213 if (mrsas_map_request(sc, cmd, ccb) == SUCCESS) {
1214 if (sc->is_ventura || sc->is_aero)
1215 io_request->RaidContext.raid_context_g35.numSGE = cmd->sge_count;
1216 else {
1217 /*
1218 * numSGE store lower 8 bit of sge_count. numSGEExt store
1219 * higher 8 bit of sge_count
1220 */
1221 io_request->RaidContext.raid_context.numSGE = cmd->sge_count;
1222 io_request->RaidContext.raid_context.numSGEExt = (uint8_t)(cmd->sge_count >> 8);
1223 }
1224 } else {
1225 device_printf(sc->mrsas_dev, "Data map/load failed.\n");
1226 return (1);
1227 }
1228 return (0);
1229 }
1230
1231 /*
1232 * mrsas_build_syspdio: Builds an DCDB command
1233 * input: Adapter instance soft state
1234 * Pointer to command packet
1235 * Pointer to CCB
1236 *
1237 * This function builds the DCDB inquiry command. It returns 0 if the command
1238 * is built successfully, otherwise it returns a 1.
1239 */
1240 int
mrsas_build_syspdio(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb,struct cam_sim * sim,u_int8_t fp_possible)1241 mrsas_build_syspdio(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
1242 union ccb *ccb, struct cam_sim *sim, u_int8_t fp_possible)
1243 {
1244 struct ccb_hdr *ccb_h = &(ccb->ccb_h);
1245 u_int32_t device_id;
1246 MR_DRV_RAID_MAP_ALL *local_map_ptr;
1247 MRSAS_RAID_SCSI_IO_REQUEST *io_request;
1248 RAID_CONTEXT *pRAID_Context;
1249 struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync;
1250
1251 io_request = cmd->io_request;
1252 /* get RAID_Context pointer */
1253 pRAID_Context = &io_request->RaidContext.raid_context;
1254 device_id = ccb_h->target_id;
1255 local_map_ptr = sc->ld_drv_map[(sc->map_id & 1)];
1256 io_request->RaidContext.raid_context.RAIDFlags = MR_RAID_FLAGS_IO_SUB_TYPE_SYSTEM_PD
1257 << MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT;
1258 io_request->RaidContext.raid_context.regLockFlags = 0;
1259 io_request->RaidContext.raid_context.regLockRowLBA = 0;
1260 io_request->RaidContext.raid_context.regLockLength = 0;
1261
1262 cmd->pdInterface = sc->target_list[device_id].interface_type;
1263
1264 /* If FW supports PD sequence number */
1265 if (sc->use_seqnum_jbod_fp &&
1266 sc->pd_list[device_id].driveType == 0x00) {
1267 //printf("Using Drv seq num\n");
1268 pd_sync = (void *)sc->jbodmap_mem[(sc->pd_seq_map_id - 1) & 1];
1269 cmd->tmCapable = pd_sync->seq[device_id].capability.tmCapable;
1270 /* More than 256 PD/JBOD support for Ventura */
1271 if (sc->support_morethan256jbod)
1272 io_request->RaidContext.raid_context.VirtualDiskTgtId =
1273 pd_sync->seq[device_id].pdTargetId;
1274 else
1275 io_request->RaidContext.raid_context.VirtualDiskTgtId =
1276 htole16(device_id + 255);
1277 io_request->RaidContext.raid_context.configSeqNum = pd_sync->seq[device_id].seqNum;
1278 io_request->DevHandle = pd_sync->seq[device_id].devHandle;
1279 if (sc->is_ventura || sc->is_aero)
1280 io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
1281 else
1282 io_request->RaidContext.raid_context.regLockFlags |=
1283 (MR_RL_FLAGS_SEQ_NUM_ENABLE | MR_RL_FLAGS_GRANT_DESTINATION_CUDA);
1284 /* raid_context.Type = MPI2_TYPE_CUDA is valid only,
1285 * if FW support Jbod Sequence number
1286 */
1287 io_request->RaidContext.raid_context.Type = MPI2_TYPE_CUDA;
1288 io_request->RaidContext.raid_context.nseg = 0x1;
1289 } else if (sc->fast_path_io) {
1290 //printf("Using LD RAID map\n");
1291 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
1292 io_request->RaidContext.raid_context.configSeqNum = 0;
1293 local_map_ptr = sc->ld_drv_map[(sc->map_id & 1)];
1294 io_request->DevHandle =
1295 local_map_ptr->raidMap.devHndlInfo[device_id].curDevHdl;
1296 } else {
1297 //printf("Using FW PATH\n");
1298 /* Want to send all IO via FW path */
1299 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
1300 io_request->RaidContext.raid_context.configSeqNum = 0;
1301 io_request->DevHandle = MR_DEVHANDLE_INVALID;
1302 }
1303
1304 cmd->request_desc->SCSIIO.DevHandle = io_request->DevHandle;
1305 cmd->request_desc->SCSIIO.MSIxIndex =
1306 sc->msix_vectors ? smp_processor_id() % sc->msix_vectors : 0;
1307
1308 if (!fp_possible) {
1309 /* system pd firmware path */
1310 io_request->Function = MRSAS_MPI2_FUNCTION_LD_IO_REQUEST;
1311 cmd->request_desc->SCSIIO.RequestFlags =
1312 (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO <<
1313 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1314 io_request->RaidContext.raid_context.timeoutValue =
1315 htole16(local_map_ptr->raidMap.fpPdIoTimeoutSec);
1316 io_request->RaidContext.raid_context.VirtualDiskTgtId = htole16(device_id);
1317 } else {
1318 /* system pd fast path */
1319 io_request->Function = MPI2_FUNCTION_SCSI_IO_REQUEST;
1320 io_request->RaidContext.raid_context.timeoutValue = htole16(local_map_ptr->raidMap.fpPdIoTimeoutSec);
1321
1322 /*
1323 * NOTE - For system pd RW cmds only IoFlags will be FAST_PATH
1324 * Because the NON RW cmds will now go via FW Queue
1325 * and not the Exception queue
1326 */
1327 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero)
1328 io_request->IoFlags |= htole16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
1329
1330 cmd->request_desc->SCSIIO.RequestFlags =
1331 (MPI2_REQ_DESCRIPT_FLAGS_FP_IO <<
1332 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
1333 }
1334
1335 io_request->LUN[1] = ccb_h->target_lun & 0xF;
1336 io_request->DataLength = htole32(cmd->length);
1337
1338 if (mrsas_map_request(sc, cmd, ccb) == SUCCESS) {
1339 if (sc->is_ventura || sc->is_aero)
1340 io_request->RaidContext.raid_context_g35.numSGE = cmd->sge_count;
1341 else {
1342 /*
1343 * numSGE store lower 8 bit of sge_count. numSGEExt store
1344 * higher 8 bit of sge_count
1345 */
1346 io_request->RaidContext.raid_context.numSGE = cmd->sge_count;
1347 io_request->RaidContext.raid_context.numSGEExt = (uint8_t)(cmd->sge_count >> 8);
1348 }
1349 } else {
1350 device_printf(sc->mrsas_dev, "Data map/load failed.\n");
1351 return (1);
1352 }
1353 return (0);
1354 }
1355
1356 /*
1357 * mrsas_is_prp_possible: This function will tell whether PRPs should be built or not
1358 * sc: Adapter instance soft state
1359 * cmd: MPT command frame pointer
1360 * nsesg: Number of OS SGEs
1361 *
1362 * This function will check whether IO is qualified to build PRPs
1363 * return: true: if PRP should be built
1364 * false: if IEEE SGLs should be built
1365 */
mrsas_is_prp_possible(struct mrsas_mpt_cmd * cmd,bus_dma_segment_t * segs,int nsegs)1366 static boolean_t mrsas_is_prp_possible(struct mrsas_mpt_cmd *cmd,
1367 bus_dma_segment_t *segs, int nsegs)
1368 {
1369 struct mrsas_softc *sc = cmd->sc;
1370 int i;
1371 u_int32_t data_length = 0;
1372 bool build_prp = false;
1373 u_int32_t mr_nvme_pg_size;
1374
1375 mr_nvme_pg_size = max(sc->nvme_page_size, MR_DEFAULT_NVME_PAGE_SIZE);
1376 data_length = cmd->length;
1377
1378 if (data_length > (mr_nvme_pg_size * 5))
1379 build_prp = true;
1380 else if ((data_length > (mr_nvme_pg_size * 4)) &&
1381 (data_length <= (mr_nvme_pg_size * 5))) {
1382 /* check if 1st SG entry size is < residual beyond 4 pages */
1383 if ((segs[0].ds_len) < (data_length - (mr_nvme_pg_size * 4)))
1384 build_prp = true;
1385 }
1386
1387 /*check for SGE holes here*/
1388 for (i = 0; i < nsegs; i++) {
1389 /* check for mid SGEs */
1390 if ((i != 0) && (i != (nsegs - 1))) {
1391 if ((segs[i].ds_addr % mr_nvme_pg_size) ||
1392 (segs[i].ds_len % mr_nvme_pg_size)) {
1393 build_prp = false;
1394 mrsas_atomic_inc(&sc->sge_holes);
1395 break;
1396 }
1397 }
1398
1399 /* check for first SGE*/
1400 if ((nsegs > 1) && (i == 0)) {
1401 if ((segs[i].ds_addr + segs[i].ds_len) % mr_nvme_pg_size) {
1402 build_prp = false;
1403 mrsas_atomic_inc(&sc->sge_holes);
1404 break;
1405 }
1406 }
1407
1408 /* check for Last SGE*/
1409 if ((nsegs > 1) && (i == (nsegs - 1))) {
1410 if (segs[i].ds_addr % mr_nvme_pg_size) {
1411 build_prp = false;
1412 mrsas_atomic_inc(&sc->sge_holes);
1413 break;
1414 }
1415 }
1416 }
1417
1418 return build_prp;
1419 }
1420
1421 /*
1422 * mrsas_map_request: Map and load data
1423 * input: Adapter instance soft state
1424 * Pointer to command packet
1425 *
1426 * For data from OS, map and load the data buffer into bus space. The SG list
1427 * is built in the callback. If the bus dmamap load is not successful,
1428 * cmd->error_code will contain the error code and a 1 is returned.
1429 */
1430 int
mrsas_map_request(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd,union ccb * ccb)1431 mrsas_map_request(struct mrsas_softc *sc,
1432 struct mrsas_mpt_cmd *cmd, union ccb *ccb)
1433 {
1434 u_int32_t retcode = 0;
1435 struct cam_sim *sim;
1436
1437 sim = xpt_path_sim(cmd->ccb_ptr->ccb_h.path);
1438
1439 if (cmd->data != NULL) {
1440 /* Map data buffer into bus space */
1441 mtx_lock(&sc->io_lock);
1442 #if (__FreeBSD_version >= 902001)
1443 retcode = bus_dmamap_load_ccb(sc->data_tag, cmd->data_dmamap, ccb,
1444 mrsas_data_load_cb, cmd, 0);
1445 #else
1446 retcode = bus_dmamap_load(sc->data_tag, cmd->data_dmamap, cmd->data,
1447 cmd->length, mrsas_data_load_cb, cmd, BUS_DMA_NOWAIT);
1448 #endif
1449 mtx_unlock(&sc->io_lock);
1450 if (retcode)
1451 device_printf(sc->mrsas_dev, "bus_dmamap_load(): retcode = %d\n", retcode);
1452 if (retcode == EINPROGRESS) {
1453 device_printf(sc->mrsas_dev, "request load in progress\n");
1454 mrsas_freeze_simq(cmd, sim);
1455 }
1456 }
1457 if (cmd->error_code)
1458 return (1);
1459 return (retcode);
1460 }
1461
1462 /*
1463 * mrsas_unmap_request: Unmap and unload data
1464 * input: Adapter instance soft state
1465 * Pointer to command packet
1466 *
1467 * This function unmaps and unloads data from OS.
1468 */
1469 void
mrsas_unmap_request(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd)1470 mrsas_unmap_request(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd)
1471 {
1472 if (cmd->data != NULL) {
1473 if (cmd->flags & MRSAS_DIR_IN)
1474 bus_dmamap_sync(sc->data_tag, cmd->data_dmamap, BUS_DMASYNC_POSTREAD);
1475 if (cmd->flags & MRSAS_DIR_OUT)
1476 bus_dmamap_sync(sc->data_tag, cmd->data_dmamap, BUS_DMASYNC_POSTWRITE);
1477 mtx_lock(&sc->io_lock);
1478 bus_dmamap_unload(sc->data_tag, cmd->data_dmamap);
1479 mtx_unlock(&sc->io_lock);
1480 }
1481 }
1482
1483 /**
1484 * mrsas_build_ieee_sgl - Prepare IEEE SGLs
1485 * @sc: Adapter soft state
1486 * @segs: OS SGEs pointers
1487 * @nseg: Number of OS SGEs
1488 * @cmd: Fusion command frame
1489 * return: void
1490 */
mrsas_build_ieee_sgl(struct mrsas_mpt_cmd * cmd,bus_dma_segment_t * segs,int nseg)1491 static void mrsas_build_ieee_sgl(struct mrsas_mpt_cmd *cmd, bus_dma_segment_t *segs, int nseg)
1492 {
1493 struct mrsas_softc *sc = cmd->sc;
1494 MRSAS_RAID_SCSI_IO_REQUEST *io_request;
1495 pMpi25IeeeSgeChain64_t sgl_ptr;
1496 int i = 0, sg_processed = 0;
1497
1498 io_request = cmd->io_request;
1499 sgl_ptr = (pMpi25IeeeSgeChain64_t)&io_request->SGL;
1500
1501 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
1502 pMpi25IeeeSgeChain64_t sgl_ptr_end = sgl_ptr;
1503
1504 sgl_ptr_end += sc->max_sge_in_main_msg - 1;
1505 sgl_ptr_end->Flags = 0;
1506 }
1507 if (nseg != 0) {
1508 for (i = 0; i < nseg; i++) {
1509 sgl_ptr->Address = htole64(segs[i].ds_addr);
1510 sgl_ptr->Length = htole32(segs[i].ds_len);
1511 sgl_ptr->Flags = 0;
1512 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
1513 if (i == nseg - 1)
1514 sgl_ptr->Flags = IEEE_SGE_FLAGS_END_OF_LIST;
1515 }
1516 sgl_ptr++;
1517 sg_processed = i + 1;
1518 if ((sg_processed == (sc->max_sge_in_main_msg - 1)) &&
1519 (nseg > sc->max_sge_in_main_msg)) {
1520 pMpi25IeeeSgeChain64_t sg_chain;
1521
1522 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
1523 if ((cmd->io_request->IoFlags & MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)
1524 != MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)
1525 cmd->io_request->ChainOffset = sc->chain_offset_io_request;
1526 else
1527 cmd->io_request->ChainOffset = 0;
1528 } else
1529 cmd->io_request->ChainOffset = sc->chain_offset_io_request;
1530 sg_chain = sgl_ptr;
1531 if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero)
1532 sg_chain->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT;
1533 else
1534 sg_chain->Flags = (IEEE_SGE_FLAGS_CHAIN_ELEMENT | MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR);
1535 sg_chain->Length = htole32((sizeof(MPI2_SGE_IO_UNION) * (nseg - sg_processed)));
1536 sg_chain->Address = htole64(cmd->chain_frame_phys_addr);
1537 sgl_ptr = (pMpi25IeeeSgeChain64_t)cmd->chain_frame;
1538 }
1539 }
1540 }
1541 }
1542
1543 /**
1544 * mrsas_build_prp_nvme - Prepare PRPs(Physical Region Page)- SGLs specific to NVMe drives only
1545 * @sc: Adapter soft state
1546 * @segs: OS SGEs pointers
1547 * @nseg: Number of OS SGEs
1548 * @cmd: Fusion command frame
1549 * return: void
1550 */
mrsas_build_prp_nvme(struct mrsas_mpt_cmd * cmd,bus_dma_segment_t * segs,int nseg)1551 static void mrsas_build_prp_nvme(struct mrsas_mpt_cmd *cmd, bus_dma_segment_t *segs, int nseg)
1552 {
1553 struct mrsas_softc *sc = cmd->sc;
1554 int sge_len, offset, num_prp_in_chain = 0;
1555 pMpi25IeeeSgeChain64_t main_chain_element, ptr_first_sgl, sgl_ptr;
1556 u_int64_t *ptr_sgl;
1557 bus_addr_t ptr_sgl_phys;
1558 u_int64_t sge_addr;
1559 u_int32_t page_mask, page_mask_result, i = 0;
1560 u_int32_t first_prp_len;
1561 int data_len = cmd->length;
1562 u_int32_t mr_nvme_pg_size = max(sc->nvme_page_size,
1563 MR_DEFAULT_NVME_PAGE_SIZE);
1564
1565 sgl_ptr = (pMpi25IeeeSgeChain64_t) &cmd->io_request->SGL;
1566 /*
1567 * NVMe has a very convoluted PRP format. One PRP is required
1568 * for each page or partial page. We need to split up OS SG
1569 * entries if they are longer than one page or cross a page
1570 * boundary. We also have to insert a PRP list pointer entry as
1571 * the last entry in each physical page of the PRP list.
1572 *
1573 * NOTE: The first PRP "entry" is actually placed in the first
1574 * SGL entry in the main message in IEEE 64 format. The 2nd
1575 * entry in the main message is the chain element, and the rest
1576 * of the PRP entries are built in the contiguous PCIe buffer.
1577 */
1578 page_mask = mr_nvme_pg_size - 1;
1579 ptr_sgl = (u_int64_t *) cmd->chain_frame;
1580 ptr_sgl_phys = cmd->chain_frame_phys_addr;
1581 memset(ptr_sgl, 0, sc->max_chain_frame_sz);
1582
1583 /* Build chain frame element which holds all PRPs except first*/
1584 main_chain_element = (pMpi25IeeeSgeChain64_t)
1585 ((u_int8_t *)sgl_ptr + sizeof(MPI25_IEEE_SGE_CHAIN64));
1586
1587 main_chain_element->Address = cmd->chain_frame_phys_addr;
1588 main_chain_element->NextChainOffset = 0;
1589 main_chain_element->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT |
1590 IEEE_SGE_FLAGS_SYSTEM_ADDR |
1591 MPI26_IEEE_SGE_FLAGS_NSF_NVME_PRP;
1592
1593 /* Build first PRP, SGE need not to be PAGE aligned*/
1594 ptr_first_sgl = sgl_ptr;
1595 sge_addr = segs[i].ds_addr;
1596 sge_len = segs[i].ds_len;
1597 i++;
1598
1599 offset = (u_int32_t) (sge_addr & page_mask);
1600 first_prp_len = mr_nvme_pg_size - offset;
1601
1602 ptr_first_sgl->Address = sge_addr;
1603 ptr_first_sgl->Length = first_prp_len;
1604
1605 data_len -= first_prp_len;
1606
1607 if (sge_len > first_prp_len) {
1608 sge_addr += first_prp_len;
1609 sge_len -= first_prp_len;
1610 } else if (sge_len == first_prp_len) {
1611 sge_addr = segs[i].ds_addr;
1612 sge_len = segs[i].ds_len;
1613 i++;
1614 }
1615
1616 for (;;) {
1617 offset = (u_int32_t) (sge_addr & page_mask);
1618
1619 /* Put PRP pointer due to page boundary*/
1620 page_mask_result = (uintptr_t)(ptr_sgl + 1) & page_mask;
1621 if (!page_mask_result) {
1622 device_printf(sc->mrsas_dev, "BRCM: Put prp pointer as we are at page boundary"
1623 " ptr_sgl: 0x%p\n", ptr_sgl);
1624 ptr_sgl_phys++;
1625 *ptr_sgl = (uintptr_t)ptr_sgl_phys;
1626 ptr_sgl++;
1627 num_prp_in_chain++;
1628 }
1629
1630 *ptr_sgl = sge_addr;
1631 ptr_sgl++;
1632 ptr_sgl_phys++;
1633 num_prp_in_chain++;
1634
1635 sge_addr += mr_nvme_pg_size;
1636 sge_len -= mr_nvme_pg_size;
1637 data_len -= mr_nvme_pg_size;
1638
1639 if (data_len <= 0)
1640 break;
1641
1642 if (sge_len > 0)
1643 continue;
1644
1645 sge_addr = segs[i].ds_addr;
1646 sge_len = segs[i].ds_len;
1647 i++;
1648 }
1649
1650 main_chain_element->Length = num_prp_in_chain * sizeof(u_int64_t);
1651 mrsas_atomic_inc(&sc->prp_count);
1652
1653 }
1654
1655 /*
1656 * mrsas_data_load_cb: Callback entry point to build SGLs
1657 * input: Pointer to command packet as argument
1658 * Pointer to segment
1659 * Number of segments Error
1660 *
1661 * This is the callback function of the bus dma map load. It builds SG list
1662 */
1663 static void
mrsas_data_load_cb(void * arg,bus_dma_segment_t * segs,int nseg,int error)1664 mrsas_data_load_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1665 {
1666 struct mrsas_mpt_cmd *cmd = (struct mrsas_mpt_cmd *)arg;
1667 struct mrsas_softc *sc = cmd->sc;
1668 boolean_t build_prp = false;
1669
1670 if (error) {
1671 cmd->error_code = error;
1672 device_printf(sc->mrsas_dev, "mrsas_data_load_cb_prp: error=%d\n", error);
1673 if (error == EFBIG) {
1674 cmd->ccb_ptr->ccb_h.status = CAM_REQ_TOO_BIG;
1675 return;
1676 }
1677 }
1678 if (cmd->flags & MRSAS_DIR_IN)
1679 bus_dmamap_sync(cmd->sc->data_tag, cmd->data_dmamap,
1680 BUS_DMASYNC_PREREAD);
1681 if (cmd->flags & MRSAS_DIR_OUT)
1682 bus_dmamap_sync(cmd->sc->data_tag, cmd->data_dmamap,
1683 BUS_DMASYNC_PREWRITE);
1684
1685 /* Check for whether PRPs should be built or IEEE SGLs*/
1686 if ((cmd->io_request->IoFlags & MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH) &&
1687 (cmd->pdInterface == NVME_PD))
1688 build_prp = mrsas_is_prp_possible(cmd, segs, nseg);
1689
1690 if (build_prp == true)
1691 mrsas_build_prp_nvme(cmd, segs, nseg);
1692 else
1693 mrsas_build_ieee_sgl(cmd, segs, nseg);
1694
1695 cmd->sge_count = nseg;
1696 }
1697
1698 /*
1699 * mrsas_freeze_simq: Freeze SIM queue
1700 * input: Pointer to command packet
1701 * Pointer to SIM
1702 *
1703 * This function freezes the sim queue.
1704 */
1705 static void
mrsas_freeze_simq(struct mrsas_mpt_cmd * cmd,struct cam_sim * sim)1706 mrsas_freeze_simq(struct mrsas_mpt_cmd *cmd, struct cam_sim *sim)
1707 {
1708 union ccb *ccb = (union ccb *)(cmd->ccb_ptr);
1709
1710 xpt_freeze_simq(sim, 1);
1711 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1712 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
1713 }
1714
1715 void
mrsas_xpt_freeze(struct mrsas_softc * sc)1716 mrsas_xpt_freeze(struct mrsas_softc *sc)
1717 {
1718 xpt_freeze_simq(sc->sim_0, 1);
1719 xpt_freeze_simq(sc->sim_1, 1);
1720 }
1721
1722 void
mrsas_xpt_release(struct mrsas_softc * sc)1723 mrsas_xpt_release(struct mrsas_softc *sc)
1724 {
1725 xpt_release_simq(sc->sim_0, 1);
1726 xpt_release_simq(sc->sim_1, 1);
1727 }
1728
1729 /*
1730 * mrsas_cmd_done: Perform remaining command completion
1731 * input: Adapter instance soft state Pointer to command packet
1732 *
1733 * This function calls ummap request and releases the MPT command.
1734 */
1735 void
mrsas_cmd_done(struct mrsas_softc * sc,struct mrsas_mpt_cmd * cmd)1736 mrsas_cmd_done(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd)
1737 {
1738 mrsas_unmap_request(sc, cmd);
1739
1740 mtx_lock(&sc->sim_lock);
1741 if (cmd->callout_owner) {
1742 callout_stop(&cmd->cm_callout);
1743 cmd->callout_owner = false;
1744 }
1745 xpt_done(cmd->ccb_ptr);
1746 cmd->ccb_ptr = NULL;
1747 mtx_unlock(&sc->sim_lock);
1748 mrsas_release_mpt_cmd(cmd);
1749 }
1750
1751 /*
1752 * mrsas_cam_poll: Polling entry point
1753 * input: Pointer to SIM
1754 *
1755 * This is currently a stub function.
1756 */
1757 static void
mrsas_cam_poll(struct cam_sim * sim)1758 mrsas_cam_poll(struct cam_sim *sim)
1759 {
1760 int i;
1761 struct mrsas_softc *sc = (struct mrsas_softc *)cam_sim_softc(sim);
1762
1763 if (sc->msix_vectors != 0){
1764 for (i=0; i<sc->msix_vectors; i++){
1765 mrsas_complete_cmd(sc, i);
1766 }
1767 } else {
1768 mrsas_complete_cmd(sc, 0);
1769 }
1770 }
1771
1772 /*
1773 * mrsas_bus_scan: Perform bus scan
1774 * input: Adapter instance soft state
1775 *
1776 * This mrsas_bus_scan function is needed for FreeBSD 7.x. Also, it should not
1777 * be called in FreeBSD 8.x and later versions, where the bus scan is
1778 * automatic.
1779 */
1780 int
mrsas_bus_scan(struct mrsas_softc * sc)1781 mrsas_bus_scan(struct mrsas_softc *sc)
1782 {
1783 union ccb *ccb_0;
1784 union ccb *ccb_1;
1785
1786 if ((ccb_0 = xpt_alloc_ccb()) == NULL) {
1787 return (ENOMEM);
1788 }
1789 if ((ccb_1 = xpt_alloc_ccb()) == NULL) {
1790 xpt_free_ccb(ccb_0);
1791 return (ENOMEM);
1792 }
1793 mtx_lock(&sc->sim_lock);
1794 if (xpt_create_path(&ccb_0->ccb_h.path, xpt_periph, cam_sim_path(sc->sim_0),
1795 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
1796 xpt_free_ccb(ccb_0);
1797 xpt_free_ccb(ccb_1);
1798 mtx_unlock(&sc->sim_lock);
1799 return (EIO);
1800 }
1801 if (xpt_create_path(&ccb_1->ccb_h.path, xpt_periph, cam_sim_path(sc->sim_1),
1802 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
1803 xpt_free_ccb(ccb_0);
1804 xpt_free_ccb(ccb_1);
1805 mtx_unlock(&sc->sim_lock);
1806 return (EIO);
1807 }
1808 mtx_unlock(&sc->sim_lock);
1809 xpt_rescan(ccb_0);
1810 xpt_rescan(ccb_1);
1811
1812 return (0);
1813 }
1814
1815 /*
1816 * mrsas_bus_scan_sim: Perform bus scan per SIM
1817 * input: adapter instance soft state
1818 *
1819 * This function will be called from Event handler on LD creation/deletion,
1820 * JBOD on/off.
1821 */
1822 int
mrsas_bus_scan_sim(struct mrsas_softc * sc,struct cam_sim * sim)1823 mrsas_bus_scan_sim(struct mrsas_softc *sc, struct cam_sim *sim)
1824 {
1825 union ccb *ccb;
1826
1827 if ((ccb = xpt_alloc_ccb()) == NULL) {
1828 return (ENOMEM);
1829 }
1830 mtx_lock(&sc->sim_lock);
1831 if (xpt_create_path(&ccb->ccb_h.path, xpt_periph, cam_sim_path(sim),
1832 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
1833 xpt_free_ccb(ccb);
1834 mtx_unlock(&sc->sim_lock);
1835 return (EIO);
1836 }
1837 mtx_unlock(&sc->sim_lock);
1838 xpt_rescan(ccb);
1839
1840 return (0);
1841 }
1842
1843 /*
1844 * mrsas_track_scsiio: Track IOs for a given target in the mpt_cmd_list
1845 * input: Adapter instance soft state
1846 * Target ID of target
1847 * Bus ID of the target
1848 *
1849 * This function checks for any pending IO in the whole mpt_cmd_list pool
1850 * with the bus_id and target_id passed in arguments. If some IO is found
1851 * that means target reset is not successfully completed.
1852 *
1853 * Returns FAIL if IOs pending to the target device, else return SUCCESS
1854 */
1855 static int
mrsas_track_scsiio(struct mrsas_softc * sc,target_id_t tgt_id,u_int32_t bus_id)1856 mrsas_track_scsiio(struct mrsas_softc *sc, target_id_t tgt_id, u_int32_t bus_id)
1857 {
1858 int i;
1859 struct mrsas_mpt_cmd *mpt_cmd = NULL;
1860
1861 for (i = 0 ; i < sc->max_fw_cmds; i++) {
1862 mpt_cmd = sc->mpt_cmd_list[i];
1863
1864 /*
1865 * Check if the target_id and bus_id is same as the timeout IO
1866 */
1867 if (mpt_cmd->ccb_ptr) {
1868 /* bus_id = 1 denotes a VD */
1869 if (bus_id == 1)
1870 tgt_id =
1871 (mpt_cmd->ccb_ptr->ccb_h.target_id - (MRSAS_MAX_PD - 1));
1872
1873 if (mpt_cmd->ccb_ptr->cpi.bus_id == bus_id &&
1874 mpt_cmd->ccb_ptr->ccb_h.target_id == tgt_id) {
1875 device_printf(sc->mrsas_dev,
1876 "IO commands pending to target id %d\n", tgt_id);
1877 return FAIL;
1878 }
1879 }
1880 }
1881
1882 return SUCCESS;
1883 }
1884
1885 #if TM_DEBUG
1886 /*
1887 * mrsas_tm_response_code: Prints TM response code received from FW
1888 * input: Adapter instance soft state
1889 * MPI reply returned from firmware
1890 *
1891 * Returns nothing.
1892 */
1893 static void
mrsas_tm_response_code(struct mrsas_softc * sc,MPI2_SCSI_TASK_MANAGE_REPLY * mpi_reply)1894 mrsas_tm_response_code(struct mrsas_softc *sc,
1895 MPI2_SCSI_TASK_MANAGE_REPLY *mpi_reply)
1896 {
1897 char *desc;
1898
1899 switch (mpi_reply->ResponseCode) {
1900 case MPI2_SCSITASKMGMT_RSP_TM_COMPLETE:
1901 desc = "task management request completed";
1902 break;
1903 case MPI2_SCSITASKMGMT_RSP_INVALID_FRAME:
1904 desc = "invalid frame";
1905 break;
1906 case MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED:
1907 desc = "task management request not supported";
1908 break;
1909 case MPI2_SCSITASKMGMT_RSP_TM_FAILED:
1910 desc = "task management request failed";
1911 break;
1912 case MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED:
1913 desc = "task management request succeeded";
1914 break;
1915 case MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN:
1916 desc = "invalid lun";
1917 break;
1918 case 0xA:
1919 desc = "overlapped tag attempted";
1920 break;
1921 case MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC:
1922 desc = "task queued, however not sent to target";
1923 break;
1924 default:
1925 desc = "unknown";
1926 break;
1927 }
1928 device_printf(sc->mrsas_dev, "response_code(%01x): %s\n",
1929 mpi_reply->ResponseCode, desc);
1930 device_printf(sc->mrsas_dev,
1931 "TerminationCount/DevHandle/Function/TaskType/IOCStat/IOCLoginfo\n"
1932 "0x%x/0x%x/0x%x/0x%x/0x%x/0x%x\n",
1933 mpi_reply->TerminationCount, mpi_reply->DevHandle,
1934 mpi_reply->Function, mpi_reply->TaskType,
1935 mpi_reply->IOCStatus, mpi_reply->IOCLogInfo);
1936 }
1937 #endif
1938
1939 /*
1940 * mrsas_issue_tm: Fires the TM command to FW and waits for completion
1941 * input: Adapter instance soft state
1942 * request descriptor compiled by mrsas_reset_targets
1943 *
1944 * Returns FAIL if TM command TIMEDOUT from FW else SUCCESS.
1945 */
1946 static int
mrsas_issue_tm(struct mrsas_softc * sc,MRSAS_REQUEST_DESCRIPTOR_UNION * req_desc)1947 mrsas_issue_tm(struct mrsas_softc *sc,
1948 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc)
1949 {
1950 int sleep_stat;
1951
1952 mrsas_fire_cmd(sc, req_desc->addr.u.low, req_desc->addr.u.high);
1953 sleep_stat = msleep(&sc->ocr_chan, &sc->sim_lock, PRIBIO, "tm_sleep", 50*hz);
1954
1955 if (sleep_stat == EWOULDBLOCK) {
1956 device_printf(sc->mrsas_dev, "tm cmd TIMEDOUT\n");
1957 return FAIL;
1958 }
1959
1960 return SUCCESS;
1961 }
1962
1963 /*
1964 * mrsas_reset_targets : Gathers info to fire a target reset command
1965 * input: Adapter instance soft state
1966 *
1967 * This function compiles data for a target reset command to be fired to the FW
1968 * and then traverse the target_reset_pool to see targets with TIMEDOUT IOs.
1969 *
1970 * Returns SUCCESS or FAIL
1971 */
mrsas_reset_targets(struct mrsas_softc * sc)1972 int mrsas_reset_targets(struct mrsas_softc *sc)
1973 {
1974 struct mrsas_mpt_cmd *tm_mpt_cmd = NULL;
1975 struct mrsas_mpt_cmd *tgt_mpt_cmd = NULL;
1976 MR_TASK_MANAGE_REQUEST *mr_request;
1977 MPI2_SCSI_TASK_MANAGE_REQUEST *tm_mpi_request;
1978 MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc;
1979 int retCode = FAIL, count, i, outstanding;
1980 u_int32_t MSIxIndex, bus_id;
1981 target_id_t tgt_id;
1982 #if TM_DEBUG
1983 MPI2_SCSI_TASK_MANAGE_REPLY *mpi_reply;
1984 #endif
1985
1986 outstanding = mrsas_atomic_read(&sc->fw_outstanding);
1987
1988 if (!outstanding) {
1989 device_printf(sc->mrsas_dev, "NO IOs pending...\n");
1990 mrsas_atomic_set(&sc->target_reset_outstanding, 0);
1991 retCode = SUCCESS;
1992 goto return_status;
1993 } else if (sc->adprecovery != MRSAS_HBA_OPERATIONAL) {
1994 device_printf(sc->mrsas_dev, "Controller is not operational\n");
1995 goto return_status;
1996 } else {
1997 /* Some more error checks will be added in future */
1998 }
1999
2000 /* Get an mpt frame and an index to fire the TM cmd */
2001 tm_mpt_cmd = mrsas_get_mpt_cmd(sc);
2002 if (!tm_mpt_cmd) {
2003 retCode = FAIL;
2004 goto return_status;
2005 }
2006
2007 req_desc = mrsas_get_request_desc(sc, (tm_mpt_cmd->index) - 1);
2008 if (!req_desc) {
2009 device_printf(sc->mrsas_dev, "Cannot get request_descriptor for tm.\n");
2010 retCode = FAIL;
2011 goto release_mpt;
2012 }
2013 memset(req_desc, 0, sizeof(MRSAS_REQUEST_DESCRIPTOR_UNION));
2014
2015 req_desc->HighPriority.SMID = tm_mpt_cmd->index;
2016 req_desc->HighPriority.RequestFlags =
2017 (MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY <<
2018 MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
2019 req_desc->HighPriority.MSIxIndex = 0;
2020 req_desc->HighPriority.LMID = 0;
2021 req_desc->HighPriority.Reserved1 = 0;
2022 tm_mpt_cmd->request_desc = req_desc;
2023
2024 mr_request = (MR_TASK_MANAGE_REQUEST *) tm_mpt_cmd->io_request;
2025 memset(mr_request, 0, sizeof(MR_TASK_MANAGE_REQUEST));
2026
2027 tm_mpi_request = (MPI2_SCSI_TASK_MANAGE_REQUEST *) &mr_request->TmRequest;
2028 tm_mpi_request->Function = MPI2_FUNCTION_SCSI_TASK_MGMT;
2029 tm_mpi_request->TaskType = MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET;
2030 tm_mpi_request->TaskMID = 0; /* smid task */
2031 tm_mpi_request->LUN[1] = 0;
2032
2033 /* Traverse the tm_mpt pool to get valid entries */
2034 for (i = 0 ; i < MRSAS_MAX_TM_TARGETS; i++) {
2035 if(!sc->target_reset_pool[i]) {
2036 continue;
2037 } else {
2038 tgt_mpt_cmd = sc->target_reset_pool[i];
2039 }
2040
2041 tgt_id = i;
2042
2043 /* See if the target is tm capable or NOT */
2044 if (!tgt_mpt_cmd->tmCapable) {
2045 device_printf(sc->mrsas_dev, "Task management NOT SUPPORTED for "
2046 "CAM target:%d\n", tgt_id);
2047
2048 retCode = FAIL;
2049 goto release_mpt;
2050 }
2051
2052 tm_mpi_request->DevHandle = tgt_mpt_cmd->io_request->DevHandle;
2053
2054 if (i < (MRSAS_MAX_PD - 1)) {
2055 mr_request->uTmReqReply.tmReqFlags.isTMForPD = 1;
2056 bus_id = 0;
2057 } else {
2058 mr_request->uTmReqReply.tmReqFlags.isTMForLD = 1;
2059 bus_id = 1;
2060 }
2061
2062 device_printf(sc->mrsas_dev, "TM will be fired for "
2063 "CAM target:%d and bus_id %d\n", tgt_id, bus_id);
2064
2065 sc->ocr_chan = (void *)&tm_mpt_cmd;
2066 retCode = mrsas_issue_tm(sc, req_desc);
2067 if (retCode == FAIL)
2068 goto release_mpt;
2069
2070 #if TM_DEBUG
2071 mpi_reply =
2072 (MPI2_SCSI_TASK_MANAGE_REPLY *) &mr_request->uTmReqReply.TMReply;
2073 mrsas_tm_response_code(sc, mpi_reply);
2074 #endif
2075 mrsas_atomic_dec(&sc->target_reset_outstanding);
2076 sc->target_reset_pool[i] = NULL;
2077
2078 /* Check for pending cmds in the mpt_cmd_pool with the tgt_id */
2079 mrsas_disable_intr(sc);
2080 /* Wait for 1 second to complete parallel ISR calling same
2081 * mrsas_complete_cmd()
2082 */
2083 msleep(&sc->ocr_chan, &sc->sim_lock, PRIBIO, "mrsas_reset_wakeup",
2084 1 * hz);
2085 count = sc->msix_vectors > 0 ? sc->msix_vectors : 1;
2086 mtx_unlock(&sc->sim_lock);
2087 for (MSIxIndex = 0; MSIxIndex < count; MSIxIndex++)
2088 mrsas_complete_cmd(sc, MSIxIndex);
2089 mtx_lock(&sc->sim_lock);
2090 retCode = mrsas_track_scsiio(sc, tgt_id, bus_id);
2091 mrsas_enable_intr(sc);
2092
2093 if (retCode == FAIL)
2094 goto release_mpt;
2095 }
2096
2097 device_printf(sc->mrsas_dev, "Number of targets outstanding "
2098 "after reset: %d\n", mrsas_atomic_read(&sc->target_reset_outstanding));
2099
2100 release_mpt:
2101 mrsas_release_mpt_cmd(tm_mpt_cmd);
2102 return_status:
2103 device_printf(sc->mrsas_dev, "target reset %s!!\n",
2104 (retCode == SUCCESS) ? "SUCCESS" : "FAIL");
2105
2106 return retCode;
2107 }
2108