1 /*-
2 * Copyright (c) 2018 Intel Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 #include <sys/param.h>
29 #include <sys/bio.h>
30 #include <sys/bus.h>
31 #include <sys/malloc.h>
32 #include <sys/uuid.h>
33
34 #include <contrib/dev/acpica/include/acpi.h>
35 #include <dev/acpica/acpivar.h>
36 #include <dev/nvdimm/nvdimm_var.h>
37
38 int
nvdimm_create_namespaces(struct SPA_mapping * spa,ACPI_TABLE_NFIT * nfitbl)39 nvdimm_create_namespaces(struct SPA_mapping *spa, ACPI_TABLE_NFIT *nfitbl)
40 {
41 ACPI_NFIT_MEMORY_MAP **regions;
42 struct nvdimm_dev *nv;
43 struct nvdimm_label_entry *e;
44 struct nvdimm_namespace *ns;
45 nfit_handle_t dimm_handle;
46 char *name;
47 int i, error, num_regions;
48
49 acpi_nfit_get_region_mappings_by_spa_range(nfitbl, spa->spa_nfit_idx,
50 ®ions, &num_regions);
51 if (num_regions == 0 || num_regions != regions[0]->InterleaveWays) {
52 free(regions, M_NVDIMM);
53 return (ENXIO);
54 }
55 dimm_handle = regions[0]->DeviceHandle;
56 nv = nvdimm_find_by_handle(dimm_handle);
57 if (nv == NULL) {
58 free(regions, M_NVDIMM);
59 return (ENXIO);
60 }
61 i = 0;
62 error = 0;
63 SLIST_FOREACH(e, &nv->labels, link) {
64 ns = malloc(sizeof(struct nvdimm_namespace), M_NVDIMM,
65 M_WAITOK | M_ZERO);
66 ns->dev.spa_domain = spa->dev.spa_domain;
67 ns->dev.spa_phys_base = spa->dev.spa_phys_base +
68 regions[0]->RegionOffset +
69 num_regions *
70 (e->label.dimm_phys_addr - regions[0]->Address);
71 ns->dev.spa_len = num_regions * e->label.raw_size;
72 ns->dev.spa_efi_mem_flags = spa->dev.spa_efi_mem_flags;
73 ns->dev.spa_memattr = spa->dev.spa_memattr;
74 asprintf(&name, M_NVDIMM, "spa%dns%d", spa->spa_nfit_idx, i);
75 error = nvdimm_spa_dev_init(&ns->dev, name, i);
76 free(name, M_NVDIMM);
77 if (error != 0)
78 break;
79 SLIST_INSERT_HEAD(&spa->namespaces, ns, link);
80 i++;
81 }
82 free(regions, M_NVDIMM);
83 return (error);
84 }
85
86 void
nvdimm_destroy_namespaces(struct SPA_mapping * spa)87 nvdimm_destroy_namespaces(struct SPA_mapping *spa)
88 {
89 struct nvdimm_namespace *ns, *next;
90
91 SLIST_FOREACH_SAFE(ns, &spa->namespaces, link, next) {
92 SLIST_REMOVE_HEAD(&spa->namespaces, link);
93 nvdimm_spa_dev_fini(&ns->dev);
94 free(ns, M_NVDIMM);
95 }
96 }
97