1 /*-
2 * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /*
28 * Ingenic JZ4780 pinctrl driver.
29 */
30
31 #include <sys/cdefs.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/conf.h>
35 #include <sys/bus.h>
36 #include <sys/gpio.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/lock.h>
40 #include <sys/mutex.h>
41 #include <sys/queue.h>
42 #include <sys/resource.h>
43 #include <sys/rman.h>
44
45 #include <machine/bus.h>
46
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49
50 #include <dev/fdt/fdt_common.h>
51 #include <dev/fdt/fdt_pinctrl.h>
52 #include <dev/fdt/simplebus.h>
53
54 #include <mips/ingenic/jz4780_regs.h>
55
56 #include "jz4780_gpio_if.h"
57
58 struct jz4780_pinctrl_softc {
59 struct simplebus_softc ssc;
60 device_t dev;
61 };
62
63 #define CHIP_REG_STRIDE 256
64 #define CHIP_REG_OFFSET(base, chip) ((base) + (chip) * CHIP_REG_STRIDE)
65
66 static int
jz4780_pinctrl_probe(device_t dev)67 jz4780_pinctrl_probe(device_t dev)
68 {
69
70 if (!ofw_bus_status_okay(dev))
71 return (ENXIO);
72
73 if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-pinctrl"))
74 return (ENXIO);
75
76 device_set_desc(dev, "Ingenic JZ4780 GPIO");
77
78 return (BUS_PROBE_DEFAULT);
79 }
80
81 static int
jz4780_pinctrl_attach(device_t dev)82 jz4780_pinctrl_attach(device_t dev)
83 {
84 struct jz4780_pinctrl_softc *sc;
85 struct resource_list *rs;
86 struct resource_list_entry *re;
87 phandle_t dt_parent, dt_child;
88 int i, ret;
89
90 sc = device_get_softc(dev);
91 sc->dev = dev;
92
93 /*
94 * Fetch our own resource list to dole memory between children
95 */
96 rs = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
97 if (rs == NULL)
98 return (ENXIO);
99 re = resource_list_find(rs, SYS_RES_MEMORY, 0);
100 if (re == NULL)
101 return (ENXIO);
102
103 simplebus_init(dev, 0);
104
105 /* Iterate over this node children, looking for pin controllers */
106 dt_parent = ofw_bus_get_node(dev);
107 i = 0;
108 for (dt_child = OF_child(dt_parent); dt_child != 0;
109 dt_child = OF_peer(dt_child)) {
110 struct simplebus_devinfo *ndi;
111 device_t child;
112 bus_addr_t phys;
113 bus_size_t size;
114
115 /* Add gpio controller child */
116 if (!OF_hasprop(dt_child, "gpio-controller"))
117 continue;
118 child = simplebus_add_device(dev, dt_child, 0, NULL, -1, NULL);
119 if (child == NULL)
120 break;
121 /* Setup child resources */
122 phys = CHIP_REG_OFFSET(re->start, i);
123 size = CHIP_REG_STRIDE;
124 if (phys + size - 1 <= re->end) {
125 ndi = device_get_ivars(child);
126 resource_list_add(&ndi->rl, SYS_RES_MEMORY, 0,
127 phys, phys + size - 1, size);
128 }
129 i++;
130 }
131
132 ret = bus_generic_attach(dev);
133 if (ret == 0) {
134 fdt_pinctrl_register(dev, "ingenic,pins");
135 fdt_pinctrl_configure_tree(dev);
136 }
137 return (ret);
138 }
139
140 static int
jz4780_pinctrl_detach(device_t dev)141 jz4780_pinctrl_detach(device_t dev)
142 {
143
144 bus_generic_detach(dev);
145 return (0);
146 }
147
148 struct jx4780_bias_prop {
149 const char *name;
150 uint32_t bias;
151 };
152
153 static struct jx4780_bias_prop jx4780_bias_table[] = {
154 { "bias-disable", 0 },
155 { "bias-pull-up", GPIO_PIN_PULLUP },
156 { "bias-pull-down", GPIO_PIN_PULLDOWN },
157 };
158
159 static int
jz4780_pinctrl_parse_pincfg(phandle_t pincfgxref,uint32_t * bias_value)160 jz4780_pinctrl_parse_pincfg(phandle_t pincfgxref, uint32_t *bias_value)
161 {
162 phandle_t pincfg_node;
163 int i;
164
165 pincfg_node = OF_node_from_xref(pincfgxref);
166 for (i = 0; i < nitems(jx4780_bias_table); i++) {
167 if (OF_hasprop(pincfg_node, jx4780_bias_table[i].name)) {
168 *bias_value = jx4780_bias_table[i].bias;
169 return 0;
170 }
171 }
172
173 return -1;
174 }
175
176 static device_t
jz4780_pinctrl_chip_lookup(struct jz4780_pinctrl_softc * sc,phandle_t chipxref)177 jz4780_pinctrl_chip_lookup(struct jz4780_pinctrl_softc *sc, phandle_t chipxref)
178 {
179 device_t chipdev;
180
181 chipdev = OF_device_from_xref(chipxref);
182 return chipdev;
183 }
184
185 static int
jz4780_pinctrl_configure_pins(device_t dev,phandle_t cfgxref)186 jz4780_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
187 {
188 struct jz4780_pinctrl_softc *sc = device_get_softc(dev);
189 device_t chip;
190 phandle_t node;
191 ssize_t i, len;
192 uint32_t *value, *pconf;
193 int result;
194
195 node = OF_node_from_xref(cfgxref);
196
197 len = OF_getencprop_alloc_multi(node, "ingenic,pins",
198 sizeof(uint32_t) * 4, (void **)&value);
199 if (len < 0) {
200 device_printf(dev,
201 "missing ingenic,pins attribute in FDT\n");
202 return (ENXIO);
203 }
204
205 pconf = value;
206 result = EINVAL;
207 for (i = 0; i < len; i++, pconf += 4) {
208 uint32_t bias;
209
210 /* Lookup the chip that handles this configuration */
211 chip = jz4780_pinctrl_chip_lookup(sc, pconf[0]);
212 if (chip == NULL) {
213 device_printf(dev,
214 "invalid gpio controller reference in FDT\n");
215 goto done;
216 }
217
218 if (jz4780_pinctrl_parse_pincfg(pconf[3], &bias) != 0) {
219 device_printf(dev,
220 "invalid pin bias for pin %u on %s in FDT\n",
221 pconf[1], ofw_bus_get_name(chip));
222 goto done;
223 }
224
225 result = JZ4780_GPIO_CONFIGURE_PIN(chip, pconf[1], pconf[2],
226 bias);
227 if (result != 0) {
228 device_printf(dev,
229 "failed to configure pin %u on %s\n", pconf[1],
230 ofw_bus_get_name(chip));
231 goto done;
232 }
233 }
234
235 result = 0;
236 done:
237 free(value, M_OFWPROP);
238 return (result);
239 }
240
241 static device_method_t jz4780_pinctrl_methods[] = {
242 /* Device interface */
243 DEVMETHOD(device_probe, jz4780_pinctrl_probe),
244 DEVMETHOD(device_attach, jz4780_pinctrl_attach),
245 DEVMETHOD(device_detach, jz4780_pinctrl_detach),
246
247 /* fdt_pinctrl interface */
248 DEVMETHOD(fdt_pinctrl_configure, jz4780_pinctrl_configure_pins),
249
250 DEVMETHOD_END
251 };
252
253 static devclass_t jz4780_pinctrl_devclass;
254 DEFINE_CLASS_1(pinctrl, jz4780_pinctrl_driver, jz4780_pinctrl_methods,
255 sizeof(struct jz4780_pinctrl_softc), simplebus_driver);
256 EARLY_DRIVER_MODULE(pinctrl, simplebus, jz4780_pinctrl_driver,
257 jz4780_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
258