1 /*-
2 * Copyright 2016 Stanislav Galabov
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 #include "opt_platform.h"
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/conf.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/lock.h>
37 #include <sys/mutex.h>
38 #include <sys/proc.h>
39 #include <sys/resource.h>
40 #include <sys/gpio.h>
41
42 #include <machine/bus.h>
43 #include <machine/intr.h>
44
45 #include <mips/mediatek/mtk_soc.h>
46
47 #include <dev/gpio/gpiobusvar.h>
48
49 #include <dev/fdt/fdt_common.h>
50 #include <dev/ofw/ofw_bus.h>
51 #include <dev/ofw/ofw_bus_subr.h>
52
53 #include <dt-bindings/interrupt-controller/irq.h>
54
55 #include "gpio_if.h"
56 #include "pic_if.h"
57
58 #define MTK_GPIO_PINS 32
59
60 enum mtk_gpio_regs {
61 GPIO_PIOINT = 0,
62 GPIO_PIOEDGE,
63 GPIO_PIORENA,
64 GPIO_PIOFENA,
65 GPIO_PIODATA,
66 GPIO_PIODIR,
67 GPIO_PIOPOL,
68 GPIO_PIOSET,
69 GPIO_PIORESET,
70 GPIO_PIOTOG,
71 GPIO_PIOMAX
72 };
73
74 struct mtk_gpio_pin_irqsrc {
75 struct intr_irqsrc isrc;
76 u_int irq;
77 };
78
79 struct mtk_gpio_pin {
80 uint32_t pin_caps;
81 uint32_t pin_flags;
82 enum intr_trigger intr_trigger;
83 enum intr_polarity intr_polarity;
84 char pin_name[GPIOMAXNAME];
85 struct mtk_gpio_pin_irqsrc pin_irqsrc;
86 };
87
88 struct mtk_gpio_softc {
89 device_t dev;
90 device_t busdev;
91 struct resource *res[2];
92 struct mtx mtx;
93 struct mtk_gpio_pin pins[MTK_GPIO_PINS];
94 void *intrhand;
95
96 uint8_t regs[GPIO_PIOMAX];
97 uint32_t num_pins;
98 uint8_t do_remap;
99 };
100
101 #define PIC_INTR_ISRC(sc, irq) (&(sc)->pins[(irq)].pin_irqsrc.isrc)
102
103 static struct resource_spec mtk_gpio_spec[] = {
104 { SYS_RES_MEMORY, 0, RF_ACTIVE },
105 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
106 { -1, 0 }
107 };
108
109 static int mtk_gpio_probe(device_t dev);
110 static int mtk_gpio_attach(device_t dev);
111 static int mtk_gpio_detach(device_t dev);
112 static int mtk_gpio_intr(void *arg);
113
114 #define MTK_GPIO_LOCK(sc) mtx_lock_spin(&(sc)->mtx)
115 #define MTK_GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx)
116 #define MTK_GPIO_LOCK_INIT(sc) \
117 mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
118 "mtk_gpio", MTX_SPIN)
119 #define MTK_GPIO_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)
120
121 #define MTK_WRITE_4(sc, reg, val) \
122 bus_write_4((sc)->res[0], (sc)->regs[(reg)], (val))
123 #define MTK_READ_4(sc, reg) \
124 bus_read_4((sc)->res[0], (sc)->regs[(reg)])
125
126 static struct ofw_compat_data compat_data[] = {
127 { "ralink,rt2880-gpio", 1 },
128 { "ralink,rt3050-gpio", 1 },
129 { "ralink,rt3352-gpio", 1 },
130 { "ralink,rt3883-gpio", 1 },
131 { "ralink,rt5350-gpio", 1 },
132 { "ralink,mt7620a-gpio", 1 },
133 { NULL, 0 }
134 };
135
136 static int
mtk_gpio_probe(device_t dev)137 mtk_gpio_probe(device_t dev)
138 {
139 phandle_t node;
140
141 if (!ofw_bus_status_okay(dev))
142 return (ENXIO);
143
144 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
145 return (ENXIO);
146
147 node = ofw_bus_get_node(dev);
148 if (!OF_hasprop(node, "gpio-controller"))
149 return (ENXIO);
150
151 device_set_desc(dev, "MTK GPIO Controller (v1)");
152
153 return (BUS_PROBE_DEFAULT);
154 }
155
156 static int
mtk_pic_register_isrcs(struct mtk_gpio_softc * sc)157 mtk_pic_register_isrcs(struct mtk_gpio_softc *sc)
158 {
159 int error;
160 uint32_t irq;
161 struct intr_irqsrc *isrc;
162 const char *name;
163
164 name = device_get_nameunit(sc->dev);
165 for (irq = 0; irq < sc->num_pins; irq++) {
166 sc->pins[irq].pin_irqsrc.irq = irq;
167 isrc = PIC_INTR_ISRC(sc, irq);
168 error = intr_isrc_register(isrc, sc->dev, 0, "%s", name);
169 if (error != 0) {
170 /* XXX call intr_isrc_deregister */
171 device_printf(sc->dev, "%s failed", __func__);
172 return (error);
173 }
174 }
175
176 return (0);
177 }
178
179 static int
mtk_gpio_pin_set_direction(struct mtk_gpio_softc * sc,uint32_t pin,uint32_t dir)180 mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin,
181 uint32_t dir)
182 {
183 uint32_t regval, mask = (1u << pin);
184
185 if (!(sc->pins[pin].pin_caps & dir))
186 return (EINVAL);
187
188 regval = MTK_READ_4(sc, GPIO_PIODIR);
189 if (dir == GPIO_PIN_INPUT)
190 regval &= ~mask;
191 else
192 regval |= mask;
193 MTK_WRITE_4(sc, GPIO_PIODIR, regval);
194
195 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
196 sc->pins[pin].pin_flags |= dir;
197
198 return (0);
199 }
200
201 static int
mtk_gpio_pin_set_invert(struct mtk_gpio_softc * sc,uint32_t pin,uint32_t val)202 mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val)
203 {
204 uint32_t regval, mask = (1u << pin);
205
206 regval = MTK_READ_4(sc, GPIO_PIOPOL);
207 if (val)
208 regval |= mask;
209 else
210 regval &= ~mask;
211 MTK_WRITE_4(sc, GPIO_PIOPOL, regval);
212 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
213 sc->pins[pin].pin_flags |= val;
214
215 return (0);
216 }
217
218 static void
mtk_gpio_pin_probe(struct mtk_gpio_softc * sc,uint32_t pin)219 mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin)
220 {
221 uint32_t mask = (1u << pin);
222 uint32_t val;
223
224 /* Clear cached gpio config */
225 sc->pins[pin].pin_flags = 0;
226
227 val = MTK_READ_4(sc, GPIO_PIORENA) |
228 MTK_READ_4(sc, GPIO_PIOFENA);
229 if (val & mask) {
230 /* Pin is in interrupt mode */
231 sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE;
232 val = MTK_READ_4(sc, GPIO_PIORENA);
233 if (val & mask)
234 sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH;
235 else
236 sc->pins[pin].intr_polarity = INTR_POLARITY_LOW;
237 }
238
239 val = MTK_READ_4(sc, GPIO_PIODIR);
240 if (val & mask)
241 sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT;
242 else
243 sc->pins[pin].pin_flags |= GPIO_PIN_INPUT;
244
245 val = MTK_READ_4(sc, GPIO_PIOPOL);
246 if (val & mask) {
247 if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) {
248 sc->pins[pin].pin_flags |= GPIO_PIN_INVIN;
249 } else {
250 sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT;
251 }
252 }
253 }
254
255 static int
mtk_gpio_attach(device_t dev)256 mtk_gpio_attach(device_t dev)
257 {
258 struct mtk_gpio_softc *sc;
259 phandle_t node;
260 uint32_t i, num_pins;
261
262 sc = device_get_softc(dev);
263 sc->dev = dev;
264
265 if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) {
266 device_printf(dev, "could not allocate resources for device\n");
267 return (ENXIO);
268 }
269
270 MTK_GPIO_LOCK_INIT(sc);
271
272 node = ofw_bus_get_node(dev);
273
274 if (OF_hasprop(node, "clocks"))
275 mtk_soc_start_clock(dev);
276 if (OF_hasprop(node, "resets"))
277 mtk_soc_reset_device(dev);
278
279 if (OF_getprop(node, "ralink,register-map", sc->regs,
280 GPIO_PIOMAX) <= 0) {
281 device_printf(dev, "Failed to read register map\n");
282 return (ENXIO);
283 }
284
285 if (OF_hasprop(node, "ralink,num-gpios") && (OF_getencprop(node,
286 "ralink,num-gpios", &num_pins, sizeof(num_pins)) >= 0))
287 sc->num_pins = num_pins;
288 else
289 sc->num_pins = MTK_GPIO_PINS;
290
291 for (i = 0; i < sc->num_pins; i++) {
292 sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
293 GPIO_PIN_INVIN | GPIO_PIN_INVOUT |
294 GPIO_INTR_EDGE_RISING | GPIO_INTR_EDGE_FALLING;
295 sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
296 sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE;
297
298 snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
299 device_get_unit(dev) + 'a', i);
300 sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
301
302 mtk_gpio_pin_probe(sc, i);
303 }
304
305 if (mtk_pic_register_isrcs(sc) != 0) {
306 device_printf(dev, "could not register PIC ISRCs\n");
307 goto fail;
308 }
309
310 if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
311 device_printf(dev, "could not register PIC\n");
312 goto fail;
313 }
314
315 if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
316 mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0)
317 goto fail_pic;
318
319 sc->busdev = gpiobus_attach_bus(dev);
320 if (sc->busdev == NULL)
321 goto fail_pic;
322
323 return (0);
324 fail_pic:
325 intr_pic_deregister(dev, OF_xref_from_node(node));
326 fail:
327 if(sc->intrhand != NULL)
328 bus_teardown_intr(dev, sc->res[1], sc->intrhand);
329 bus_release_resources(dev, mtk_gpio_spec, sc->res);
330 MTK_GPIO_LOCK_DESTROY(sc);
331 return (ENXIO);
332 }
333
334 static int
mtk_gpio_detach(device_t dev)335 mtk_gpio_detach(device_t dev)
336 {
337 struct mtk_gpio_softc *sc = device_get_softc(dev);
338 phandle_t node;
339
340 node = ofw_bus_get_node(dev);
341 intr_pic_deregister(dev, OF_xref_from_node(node));
342 if (sc->intrhand != NULL)
343 bus_teardown_intr(dev, sc->res[1], sc->intrhand);
344 bus_release_resources(dev, mtk_gpio_spec, sc->res);
345 MTK_GPIO_LOCK_DESTROY(sc);
346 return (0);
347 }
348
349 static device_t
mtk_gpio_get_bus(device_t dev)350 mtk_gpio_get_bus(device_t dev)
351 {
352 struct mtk_gpio_softc *sc = device_get_softc(dev);
353
354 return (sc->busdev);
355 }
356
357 static int
mtk_gpio_pin_max(device_t dev,int * maxpin)358 mtk_gpio_pin_max(device_t dev, int *maxpin)
359 {
360 struct mtk_gpio_softc *sc = device_get_softc(dev);
361
362 *maxpin = sc->num_pins - 1;
363
364 return (0);
365 }
366
367 static int
mtk_gpio_pin_getcaps(device_t dev,uint32_t pin,uint32_t * caps)368 mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
369 {
370 struct mtk_gpio_softc *sc = device_get_softc(dev);
371
372 if (pin >= sc->num_pins)
373 return (EINVAL);
374
375 MTK_GPIO_LOCK(sc);
376 *caps = sc->pins[pin].pin_caps;
377 MTK_GPIO_UNLOCK(sc);
378
379 return (0);
380 }
381
382 static int
mtk_gpio_pin_getflags(device_t dev,uint32_t pin,uint32_t * flags)383 mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
384 {
385 struct mtk_gpio_softc *sc = device_get_softc(dev);
386
387 if (pin >= sc->num_pins)
388 return (EINVAL);
389
390 MTK_GPIO_LOCK(sc);
391 *flags = sc->pins[pin].pin_flags;
392 MTK_GPIO_UNLOCK(sc);
393
394 return (0);
395 }
396
397 static int
mtk_gpio_pin_getname(device_t dev,uint32_t pin,char * name)398 mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
399 {
400 struct mtk_gpio_softc *sc = device_get_softc(dev);
401
402 if (pin >= sc->num_pins)
403 return (EINVAL);
404
405 strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1);
406 name[GPIOMAXNAME - 1] = '\0';
407
408 return (0);
409 }
410
411 static int
mtk_gpio_pin_setflags(device_t dev,uint32_t pin,uint32_t flags)412 mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
413 {
414 struct mtk_gpio_softc *sc;
415 int retval;
416
417 sc = device_get_softc(dev);
418
419 if (pin >= sc->num_pins)
420 return (EINVAL);
421
422 MTK_GPIO_LOCK(sc);
423 retval = mtk_gpio_pin_set_direction(sc, pin,
424 flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT));
425 if (retval == 0)
426 retval = mtk_gpio_pin_set_invert(sc, pin,
427 flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT));
428 MTK_GPIO_UNLOCK(sc);
429
430 return (retval);
431 }
432
433 static int
mtk_gpio_pin_set(device_t dev,uint32_t pin,unsigned int value)434 mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
435 {
436 struct mtk_gpio_softc *sc;
437 int ret;
438
439 sc = device_get_softc(dev);
440 ret = 0;
441
442 if (pin >= sc->num_pins)
443 return (EINVAL);
444
445 MTK_GPIO_LOCK(sc);
446 if (value)
447 MTK_WRITE_4(sc, GPIO_PIOSET, (1u << pin));
448 else
449 MTK_WRITE_4(sc, GPIO_PIORESET, (1u << pin));
450 MTK_GPIO_UNLOCK(sc);
451
452 return (ret);
453 }
454
455 static int
mtk_gpio_pin_get(device_t dev,uint32_t pin,unsigned int * val)456 mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
457 {
458 struct mtk_gpio_softc *sc;
459 uint32_t data;
460 int ret;
461
462 sc = device_get_softc(dev);
463 ret = 0;
464
465 if (pin >= sc->num_pins)
466 return (EINVAL);
467
468 MTK_GPIO_LOCK(sc);
469 data = MTK_READ_4(sc, GPIO_PIODATA);
470 *val = (data & (1u << pin)) ? 1 : 0;
471 MTK_GPIO_UNLOCK(sc);
472
473 return (ret);
474 }
475
476 static int
mtk_gpio_pin_toggle(device_t dev,uint32_t pin)477 mtk_gpio_pin_toggle(device_t dev, uint32_t pin)
478 {
479 struct mtk_gpio_softc *sc;
480 int ret;
481
482 sc = device_get_softc(dev);
483 ret = 0;
484
485 if (pin >= sc->num_pins)
486 return (EINVAL);
487
488 MTK_GPIO_LOCK(sc);
489 if (!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) {
490 ret = EINVAL;
491 goto out;
492 }
493 MTK_WRITE_4(sc, GPIO_PIOTOG, (1u << pin));
494
495 out:
496 MTK_GPIO_UNLOCK(sc);
497
498 return (ret);
499 }
500
501 static int
mtk_gpio_pic_map_fdt(struct mtk_gpio_softc * sc,struct intr_map_data_fdt * daf,u_int * irqp,uint32_t * modep)502 mtk_gpio_pic_map_fdt(struct mtk_gpio_softc *sc,
503 struct intr_map_data_fdt *daf, u_int *irqp, uint32_t *modep)
504 {
505 u_int irq;
506
507 if (daf->ncells != 1) {
508 device_printf(sc->dev, "Invalid #interrupt-cells\n");
509 return (EINVAL);
510 }
511
512 irq = daf->cells[0];
513
514 if (irq >= sc->num_pins) {
515 device_printf(sc->dev, "Invalid interrupt number %u\n", irq);
516 return (EINVAL);
517 }
518
519 *irqp = irq;
520 if (modep != NULL)
521 *modep = GPIO_INTR_EDGE_BOTH;
522
523 return (0);
524 }
525
526 static int
mtk_gpio_pic_map_gpio(struct mtk_gpio_softc * sc,struct intr_map_data_gpio * dag,u_int * irqp,uint32_t * modep)527 mtk_gpio_pic_map_gpio(struct mtk_gpio_softc *sc,
528 struct intr_map_data_gpio *dag, u_int *irqp, uint32_t *modep)
529 {
530 u_int irq;
531
532 irq = dag->gpio_pin_num;
533 if (irq >= sc->num_pins) {
534 device_printf(sc->dev, "Invalid interrupt number %u\n", irq);
535 return (EINVAL);
536 }
537
538 *irqp = irq;
539 if (modep != NULL)
540 *modep = dag->gpio_intr_mode;
541
542 return (0);
543 }
544
545 static int
mtk_gpio_pic_map_intr(device_t dev,struct intr_map_data * data,struct intr_irqsrc ** isrcp)546 mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
547 struct intr_irqsrc **isrcp)
548 {
549 int error;
550 u_int irq;
551 struct mtk_gpio_softc *sc;
552
553 sc = device_get_softc(dev);
554 switch (data->type) {
555 case INTR_MAP_DATA_FDT:
556 error = (mtk_gpio_pic_map_fdt(sc,
557 (struct intr_map_data_fdt *)data, &irq, NULL));
558 break;
559 case INTR_MAP_DATA_GPIO:
560 error = (mtk_gpio_pic_map_gpio(sc,
561 (struct intr_map_data_gpio *)data, &irq, NULL));
562 break;
563 default:
564 error = EINVAL;
565 break;
566 }
567
568 if (error != 0) {
569 device_printf(dev, "Invalid map type\n");
570 return (error);
571 }
572
573 *isrcp = PIC_INTR_ISRC(sc, irq);
574 return (0);
575 }
576
577 static void
mtk_gpio_pic_enable_intr(device_t dev,struct intr_irqsrc * isrc)578 mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
579 {
580 struct mtk_gpio_softc *sc;
581 struct mtk_gpio_pin_irqsrc *pisrc;
582 uint32_t pin, mask, val;
583
584 sc = device_get_softc(dev);
585
586 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
587 pin = pisrc->irq;
588 mask = 1u << pin;
589
590 MTK_GPIO_LOCK(sc);
591
592 if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) {
593 val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
594 MTK_WRITE_4(sc, GPIO_PIORENA, val);
595 val = MTK_READ_4(sc, GPIO_PIOFENA) | mask;
596 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
597 } else {
598 val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
599 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
600 val = MTK_READ_4(sc, GPIO_PIORENA) | mask;
601 MTK_WRITE_4(sc, GPIO_PIORENA, val);
602 }
603
604 MTK_GPIO_UNLOCK(sc);
605 }
606
607 static void
mtk_gpio_pic_disable_intr(device_t dev,struct intr_irqsrc * isrc)608 mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
609 {
610 struct mtk_gpio_softc *sc;
611 struct mtk_gpio_pin_irqsrc *pisrc;
612 uint32_t pin, mask, val;
613
614 sc = device_get_softc(dev);
615
616 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
617 pin = pisrc->irq;
618 mask = 1u << pin;
619
620 MTK_GPIO_LOCK(sc);
621
622 val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
623 MTK_WRITE_4(sc, GPIO_PIORENA, val);
624 val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
625 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
626
627 MTK_GPIO_UNLOCK(sc);
628 }
629
630 static void
mtk_gpio_pic_pre_ithread(device_t dev,struct intr_irqsrc * isrc)631 mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
632 {
633
634 mtk_gpio_pic_disable_intr(dev, isrc);
635 }
636
637 static void
mtk_gpio_pic_post_ithread(device_t dev,struct intr_irqsrc * isrc)638 mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
639 {
640
641 mtk_gpio_pic_enable_intr(dev, isrc);
642 }
643
644 static void
mtk_gpio_pic_post_filter(device_t dev,struct intr_irqsrc * isrc)645 mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
646 {
647 struct mtk_gpio_softc *sc;
648 struct mtk_gpio_pin_irqsrc *pisrc;
649
650 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
651 sc = device_get_softc(dev);
652 MTK_GPIO_LOCK(sc);
653 MTK_WRITE_4(sc, GPIO_PIOINT, 1u << pisrc->irq);
654 MTK_GPIO_UNLOCK(sc);
655 }
656
657 static int
mtk_gpio_pic_setup_intr(device_t dev,struct intr_irqsrc * isrc,struct resource * res,struct intr_map_data * data)658 mtk_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
659 struct resource *res, struct intr_map_data *data)
660 {
661 struct mtk_gpio_softc *sc;
662 uint32_t val;
663 int error;
664 uint32_t mode;
665 u_int irq;
666
667 if (data == NULL)
668 return (ENOTSUP);
669
670 sc = device_get_softc(dev);
671
672 switch (data->type) {
673 case INTR_MAP_DATA_FDT:
674 error = mtk_gpio_pic_map_fdt(sc,
675 (struct intr_map_data_fdt *)data, &irq, &mode);
676 break;
677 case INTR_MAP_DATA_GPIO:
678 error = mtk_gpio_pic_map_gpio(sc,
679 (struct intr_map_data_gpio *)data, &irq, &mode);
680 break;
681 default:
682 error = ENOTSUP;
683 break;
684 }
685
686 if (error != 0)
687 return (error);
688
689 MTK_GPIO_LOCK(sc);
690 if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_RISING) {
691 val = MTK_READ_4(sc, GPIO_PIORENA) | (1u << irq);
692 MTK_WRITE_4(sc, GPIO_PIORENA, val);
693 }
694 if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_FALLING) {
695 val = MTK_READ_4(sc, GPIO_PIOFENA) | (1u << irq);
696 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
697 }
698 MTK_GPIO_UNLOCK(sc);
699 return (0);
700 }
701
702 static int
mtk_gpio_intr(void * arg)703 mtk_gpio_intr(void *arg)
704 {
705 struct mtk_gpio_softc *sc;
706 uint32_t i, interrupts;
707
708 sc = arg;
709 interrupts = MTK_READ_4(sc, GPIO_PIOINT);
710 MTK_WRITE_4(sc, GPIO_PIOINT, interrupts);
711
712 for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
713 if ((interrupts & 0x1) == 0)
714 continue;
715 if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
716 curthread->td_intr_frame) != 0) {
717 device_printf(sc->dev, "spurious interrupt %d\n", i);
718 }
719 }
720
721 return (FILTER_HANDLED);
722 }
723
724 static phandle_t
mtk_gpio_get_node(device_t bus,device_t dev)725 mtk_gpio_get_node(device_t bus, device_t dev)
726 {
727
728 /* We only have one child, the GPIO bus, which needs our own node. */
729 return (ofw_bus_get_node(bus));
730 }
731
732 static device_method_t mtk_gpio_methods[] = {
733 /* Device interface */
734 DEVMETHOD(device_probe, mtk_gpio_probe),
735 DEVMETHOD(device_attach, mtk_gpio_attach),
736 DEVMETHOD(device_detach, mtk_gpio_detach),
737
738 /* GPIO protocol */
739 DEVMETHOD(gpio_get_bus, mtk_gpio_get_bus),
740 DEVMETHOD(gpio_pin_max, mtk_gpio_pin_max),
741 DEVMETHOD(gpio_pin_getname, mtk_gpio_pin_getname),
742 DEVMETHOD(gpio_pin_getflags, mtk_gpio_pin_getflags),
743 DEVMETHOD(gpio_pin_getcaps, mtk_gpio_pin_getcaps),
744 DEVMETHOD(gpio_pin_setflags, mtk_gpio_pin_setflags),
745 DEVMETHOD(gpio_pin_get, mtk_gpio_pin_get),
746 DEVMETHOD(gpio_pin_set, mtk_gpio_pin_set),
747 DEVMETHOD(gpio_pin_toggle, mtk_gpio_pin_toggle),
748
749 /* Interrupt controller interface */
750 DEVMETHOD(pic_disable_intr, mtk_gpio_pic_disable_intr),
751 DEVMETHOD(pic_enable_intr, mtk_gpio_pic_enable_intr),
752 DEVMETHOD(pic_map_intr, mtk_gpio_pic_map_intr),
753 DEVMETHOD(pic_setup_intr, mtk_gpio_pic_setup_intr),
754 DEVMETHOD(pic_post_filter, mtk_gpio_pic_post_filter),
755 DEVMETHOD(pic_post_ithread, mtk_gpio_pic_post_ithread),
756 DEVMETHOD(pic_pre_ithread, mtk_gpio_pic_pre_ithread),
757
758 /* ofw_bus interface */
759 DEVMETHOD(ofw_bus_get_node, mtk_gpio_get_node),
760
761 DEVMETHOD_END
762 };
763
764 static driver_t mtk_gpio_driver = {
765 "gpio",
766 mtk_gpio_methods,
767 sizeof(struct mtk_gpio_softc),
768 };
769
770 static devclass_t mtk_gpio_devclass;
771
772 EARLY_DRIVER_MODULE(mtk_gpio_v1, simplebus, mtk_gpio_driver,
773 mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
774