1 /*-
2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
4 * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
5 * Copyright (c) 2016, Stanislav Galabov <sgalabov@gmail.com>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
13 * disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 #include <sys/cdefs.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/rman.h>
39 #include <sys/lock.h>
40 #include <sys/mutex.h>
41
42 #include <machine/bus.h>
43 #include <machine/cpu.h>
44
45 #include <dev/spibus/spi.h>
46 #include <dev/spibus/spibusvar.h>
47 #include "spibus_if.h"
48
49 #include "opt_platform.h"
50
51 #include <dev/ofw/openfirm.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
54
55 #include <mips/mediatek/mtk_spi_v2.h>
56 #include <dev/flash/mx25lreg.h>
57
58 #undef MTK_SPI_DEBUG
59 #ifdef MTK_SPI_DEBUG
60 #define dprintf printf
61 #else
62 #define dprintf(x, arg...)
63 #endif
64
65 /*
66 * register space access macros
67 */
68 #define SPI_WRITE(sc, reg, val) do { \
69 bus_write_4(sc->sc_mem_res, (reg), (val)); \
70 } while (0)
71
72 #define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg))
73
74 #define SPI_SET_BITS(sc, reg, bits) \
75 SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
76
77 #define SPI_CLEAR_BITS(sc, reg, bits) \
78 SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
79
80 struct mtk_spi_softc {
81 device_t sc_dev;
82 struct resource *sc_mem_res;
83 };
84
85 static int mtk_spi_probe(device_t);
86 static int mtk_spi_attach(device_t);
87 static int mtk_spi_detach(device_t);
88 static int mtk_spi_wait(struct mtk_spi_softc *);
89 static void mtk_spi_chip_activate(struct mtk_spi_softc *);
90 static void mtk_spi_chip_deactivate(struct mtk_spi_softc *);
91 static uint8_t mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int);
92 static int mtk_spi_transfer(device_t, device_t, struct spi_command *);
93 static phandle_t mtk_spi_get_node(device_t, device_t);
94
95 static struct ofw_compat_data compat_data[] = {
96 { "ralink,mt7621-spi", 1 },
97 { "ralink,mtk7628an-spi", 1 },
98 { NULL, 0 }
99 };
100
101 static int
mtk_spi_probe(device_t dev)102 mtk_spi_probe(device_t dev)
103 {
104
105 if (!ofw_bus_status_okay(dev))
106 return (ENXIO);
107
108 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
109 return(ENXIO);
110
111 device_set_desc(dev, "MTK SPI Controller (v2)");
112
113 return (0);
114 }
115
116 static int
mtk_spi_attach(device_t dev)117 mtk_spi_attach(device_t dev)
118 {
119 struct mtk_spi_softc *sc = device_get_softc(dev);
120 uint32_t val;
121 int rid;
122
123 sc->sc_dev = dev;
124 rid = 0;
125 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
126 RF_ACTIVE);
127 if (!sc->sc_mem_res) {
128 device_printf(dev, "Could not map memory\n");
129 return (ENXIO);
130 }
131
132 if (mtk_spi_wait(sc)) {
133 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
134 return (EBUSY);
135 }
136
137 val = SPI_READ(sc, MTK_SPIMASTER);
138 val &= ~(0xfff << 16);
139 val |= 13 << 16;
140 val |= 7 << 29;
141 val |= 1 << 2;
142 SPI_WRITE(sc, MTK_SPIMASTER, val);
143 /*
144 * W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2.
145 * Update: divide by 4, DEV2 to fast for flash.
146 */
147
148 device_add_child(dev, "spibus", 0);
149 return (bus_generic_attach(dev));
150 }
151
152 static int
mtk_spi_detach(device_t dev)153 mtk_spi_detach(device_t dev)
154 {
155 struct mtk_spi_softc *sc = device_get_softc(dev);
156
157 if (sc->sc_mem_res)
158 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
159
160 return (0);
161 }
162
163 static void
mtk_spi_chip_activate(struct mtk_spi_softc * sc)164 mtk_spi_chip_activate(struct mtk_spi_softc *sc)
165 {
166 mtk_spi_wait(sc);
167 /*
168 * Put all CSx to low
169 */
170 SPI_SET_BITS(sc, MTK_SPIPOLAR, 1);
171 }
172
173 static void
mtk_spi_chip_deactivate(struct mtk_spi_softc * sc)174 mtk_spi_chip_deactivate(struct mtk_spi_softc *sc)
175 {
176 mtk_spi_wait(sc);
177 /*
178 * Put all CSx to high
179 */
180 SPI_CLEAR_BITS(sc, MTK_SPIPOLAR, 1);
181 }
182
183 static int
mtk_spi_wait(struct mtk_spi_softc * sc)184 mtk_spi_wait(struct mtk_spi_softc *sc)
185 {
186 int i = 1000;
187
188 while (i--) {
189 if (!(SPI_READ(sc, MTK_SPITRANS) & SPIBUSY))
190 break;
191 }
192 if (i == 0) {
193 return (1);
194 }
195
196 return (0);
197 }
198
199 static uint8_t
mtk_spi_txrx(struct mtk_spi_softc * sc,uint8_t * data,int write)200 mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write)
201 {
202
203 if (mtk_spi_wait(sc))
204 return (0xff);
205
206 if (write == MTK_SPI_WRITE) {
207 SPI_WRITE(sc, MTK_SPIOPCODE, (*data));
208 SPI_WRITE(sc, MTK_SPIMOREBUF, (8<<24));
209 } else {
210 SPI_WRITE(sc, MTK_SPIMOREBUF, (8<<12));
211 }
212
213 SPI_SET_BITS(sc, MTK_SPITRANS, SPISTART);
214
215 if (mtk_spi_wait(sc))
216 return (0xff);
217
218 if (write == MTK_SPI_READ) {
219 *data = SPI_READ(sc, MTK_SPIDATA) & 0xff;
220 }
221
222 return (0);
223 }
224
225 static int
mtk_spi_transfer(device_t dev,device_t child,struct spi_command * cmd)226 mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
227 {
228 struct mtk_spi_softc *sc;
229 uint8_t *buf, byte, *tx_buf;
230 uint32_t cs;
231 int i, sz, error, write = 0;
232
233 sc = device_get_softc(dev);
234
235 spibus_get_cs(child, &cs);
236
237 cs &= ~SPIBUS_CS_HIGH;
238
239 if (cs != 0)
240 /* Only 1 CS */
241 return (ENXIO);
242
243 /* There is always a command to transfer. */
244 tx_buf = (uint8_t *)(cmd->tx_cmd);
245
246 /* Perform some fixup because MTK dont support duplex SPI */
247 switch(tx_buf[0]) {
248 case CMD_READ_IDENT:
249 cmd->tx_cmd_sz = 1;
250 cmd->rx_cmd_sz = 3;
251 break;
252 case CMD_ENTER_4B_MODE:
253 case CMD_EXIT_4B_MODE:
254 case CMD_WRITE_ENABLE:
255 case CMD_WRITE_DISABLE:
256 cmd->tx_cmd_sz = 1;
257 cmd->rx_cmd_sz = 0;
258 break;
259 case CMD_READ_STATUS:
260 cmd->tx_cmd_sz = 1;
261 cmd->rx_cmd_sz = 1;
262 break;
263 case CMD_READ:
264 case CMD_FAST_READ:
265 cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
266 break;
267 case CMD_SECTOR_ERASE:
268 cmd->rx_cmd_sz = 0;
269 break;
270 case CMD_PAGE_PROGRAM:
271 cmd->rx_cmd_sz = cmd->rx_data_sz = 0;
272 break;
273 }
274
275 mtk_spi_chip_activate(sc);
276
277 if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) {
278 buf = (uint8_t *)(cmd->rx_cmd);
279 tx_buf = (uint8_t *)(cmd->tx_cmd);
280 sz = cmd->tx_cmd_sz + cmd->rx_cmd_sz;
281
282 for (i = 0; i < sz; i++) {
283 if(i < cmd->tx_cmd_sz) {
284 byte = tx_buf[i];
285 error = mtk_spi_txrx(sc, &byte,
286 MTK_SPI_WRITE);
287 if (error)
288 goto mtk_spi_transfer_fail;
289 continue;
290 }
291 error = mtk_spi_txrx(sc, &byte,
292 MTK_SPI_READ);
293 if (error)
294 goto mtk_spi_transfer_fail;
295 buf[i] = byte;
296 }
297 }
298
299 /*
300 * Transfer/Receive data
301 */
302
303 if (cmd->tx_data_sz + cmd->rx_data_sz) {
304 write = (cmd->tx_data_sz > 0)?1:0;
305 buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data);
306 sz = write ? cmd->tx_data_sz : cmd->rx_data_sz;
307
308 for (i = 0; i < sz; i++) {
309 byte = buf[i];
310 error = mtk_spi_txrx(sc, &byte,
311 write ? MTK_SPI_WRITE : MTK_SPI_READ);
312 if (error)
313 goto mtk_spi_transfer_fail;
314 buf[i] = byte;
315 }
316 }
317 mtk_spi_transfer_fail:
318 mtk_spi_chip_deactivate(sc);
319
320 return (0);
321 }
322
323 static phandle_t
mtk_spi_get_node(device_t bus,device_t dev)324 mtk_spi_get_node(device_t bus, device_t dev)
325 {
326
327 /* We only have one child, the SPI bus, which needs our own node. */
328 return (ofw_bus_get_node(bus));
329 }
330
331 static device_method_t mtk_spi_methods[] = {
332 /* Device interface */
333 DEVMETHOD(device_probe, mtk_spi_probe),
334 DEVMETHOD(device_attach, mtk_spi_attach),
335 DEVMETHOD(device_detach, mtk_spi_detach),
336
337 DEVMETHOD(spibus_transfer, mtk_spi_transfer),
338
339 /* ofw_bus interface */
340 DEVMETHOD(ofw_bus_get_node, mtk_spi_get_node),
341
342 DEVMETHOD_END
343 };
344
345 static driver_t mtk_spi_driver = {
346 .name = "spi",
347 .methods = mtk_spi_methods,
348 .size = sizeof(struct mtk_spi_softc),
349 };
350
351 static devclass_t mtk_spi_devclass;
352
353 DRIVER_MODULE(mtk_spi_v2, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0);
354