1/*        $NetBSD: bzero.S,v 1.10 2009/12/14 02:53:52 matt Exp $      */
2
3/*-
4 * Copyright (c) 1991, 1993
5 *        The Regents of the University of California.  All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Ralph Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35#include <mips/asm.h>
36
37#if defined(LIBC_SCCS) && !defined(lint)
38#if 0
39          RCSID("from: @(#)bzero.s      8.1 (Berkeley) 6/4/93")
40#else
41          RCSID("$NetBSD: bzero.S,v 1.10 2009/12/14 02:53:52 matt Exp $")
42#endif
43#endif /* LIBC_SCCS and not lint */
44
45
46#define _LOCORE               /* XXX not really, just assembly-code source */
47#include <machine/endian.h>
48
49/* bzero(s1, n) */
50
51LEAF(bzero)
52          .set      noreorder
53          blt                 a1, 3*SZREG, smallclr # small amount to clear?
54          PTR_SUBU  a3, zero, a0        # compute # bytes to word align address
55          and                 a3, a3, SZREG-1
56          beq                 a3, zero, 1f        # skip if word aligned
57#if SZREG == 4
58          PTR_SUBU  a1, a1, a3          # subtract from remaining count
59          SWHI                zero, 0(a0)         # clear 1, 2, or 3 bytes to align
60          PTR_ADDU  a0, a0, a3
61#endif
62#if SZREG == 8
63          PTR_SUBU  a1, a1, a3          # subtract from remaining count
64          PTR_ADDU  a0, a0, a3          # align dst to next word
65          sll                 a3, a3, 3 # bits to bytes
66          li                  a2, -1              # make a mask
67#if _BYTE_ORDER == _BIG_ENDIAN
68          REG_SRLV  a2, a2, a3          # we want to keep the MSB bytes
69#endif
70#if _BYTE_ORDER == _LITTLE_ENDIAN
71          REG_SLLV  a2, a2, a3          # we want to keep the LSB bytes
72#endif
73          nor                 a2, zero, a2        # complement the mask
74          REG_L               v0, -SZREG(a0)      # load the word to partially clear
75          and                 v0, v0, a2          # clear the bytes
76          REG_S               v0, -SZREG(a0)      # store it back
77#endif
781:
79          and                 v0, a1, SZREG-1     # compute number of words left
80          PTR_SUBU  a3, a1, v0
81          move                a1, v0
82          PTR_ADDU  a3, a3, a0          # compute ending address
832:
84          PTR_ADDU  a0, a0, SZREG       # clear words
85          bne                 a0, a3, 2b          #  unrolling loop doesnt help
86          REG_S               zero, -SZREG(a0) # since we are limited by memory speed
87smallclr:
88          ble                 a1, zero, 2f
89          PTR_ADDU  a3, a1, a0          # compute ending address
901:
91          PTR_ADDU  a0, a0, 1 # clear bytes
92          bne                 a0, a3, 1b
93          sb                  zero, -1(a0)
942:
95          j                   ra
96          nop
97END(bzero)
98