1 /* $NetBSD: admgpio.c,v 1.6 2021/08/07 16:18:58 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2007 David Young. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or
7 * without modification, are permitted provided that the following
8 * conditions are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
19 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
21 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
25 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
27 * OF SUCH DAMAGE.
28 */
29 #include <sys/cdefs.h>
30
31 __KERNEL_RCSID(0, "$NetBSD: admgpio.c,v 1.6 2021/08/07 16:18:58 thorpej Exp $");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/device.h>
36 #include <sys/gpio.h>
37 #include <sys/kernel.h> /* for hz */
38
39 #include <sys/bus.h>
40
41 #include <dev/gpio/gpiovar.h>
42
43 #include <mips/adm5120/include/adm5120reg.h>
44 #include <mips/adm5120/include/adm5120var.h>
45 #include <mips/adm5120/include/adm5120_mainbusvar.h>
46
47 static inline uint32_t
admgpio_read(struct mainbus_softc * sc)48 admgpio_read(struct mainbus_softc *sc)
49 {
50 return bus_space_read_4(sc->sc_obiot, sc->sc_gpioh, ADM5120_GPIO0);
51 }
52
53 static inline void
admgpio_write(struct mainbus_softc * sc,uint32_t val)54 admgpio_write(struct mainbus_softc *sc, uint32_t val)
55 {
56 bus_space_write_4(sc->sc_obiot, sc->sc_gpioh, ADM5120_GPIO0, val);
57 }
58
59 static void
admgpio_pin_ctl(void * cookie,int pin,int flags)60 admgpio_pin_ctl(void *cookie, int pin, int flags)
61 {
62 struct mainbus_softc *sc = cookie;
63 uint32_t gpio0, mask;
64
65 KASSERT(flags == GPIO_PIN_INPUT || flags == GPIO_PIN_OUTPUT);
66
67 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OE);
68 gpio0 = admgpio_read(sc);
69
70 if (flags == GPIO_PIN_OUTPUT)
71 admgpio_write(sc, gpio0 | mask);
72 else
73 admgpio_write(sc, gpio0 & ~mask);
74 }
75
76 static int
admgpio_pin_read(void * cookie,int pin)77 admgpio_pin_read(void *cookie, int pin)
78 {
79 struct mainbus_softc *sc = cookie;
80 uint32_t gpio0, mask;
81
82 KASSERT(pin >= 0 && pin < 8);
83
84 if (sc->sc_pins[pin].pin_flags == GPIO_PIN_INPUT)
85 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_IV);
86 else
87 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OV);
88
89 gpio0 = admgpio_read(sc);
90
91 return ((gpio0 & mask) != 0) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
92 }
93
94 static void
admgpio_pin_write(void * cookie,int pin,int value)95 admgpio_pin_write(void *cookie, int pin, int value)
96 {
97 struct mainbus_softc *sc = cookie;
98 uint32_t gpio0, mask;
99
100 KASSERT(pin >= 0 && pin < 8);
101
102 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OV);
103 gpio0 = admgpio_read(sc);
104
105 admgpio_write(sc,
106 (value == GPIO_PIN_HIGH) ? (gpio0 | mask) : (gpio0 & ~mask));
107 }
108
109 device_t
admgpio_attach(struct mainbus_softc * sc)110 admgpio_attach(struct mainbus_softc *sc)
111 {
112 int pin;
113 uint32_t oe;
114 struct gpiobus_attach_args gba;
115
116 oe = __SHIFTOUT(admgpio_read(sc), ADM5120_GPIO0_OE);
117
118 for (pin = 0; pin < __arraycount(sc->sc_pins); pin++) {
119 sc->sc_pins[pin].pin_num = pin;
120 sc->sc_pins[pin].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
121
122 if ((oe & (1 << pin)) != 0)
123 sc->sc_pins[pin].pin_flags = GPIO_PIN_OUTPUT;
124 else
125 sc->sc_pins[pin].pin_flags = GPIO_PIN_INPUT;
126
127 sc->sc_pins[pin].pin_state = admgpio_pin_read(sc, pin);
128 }
129
130 sc->sc_gp.gp_cookie = sc;
131 sc->sc_gp.gp_pin_read = admgpio_pin_read;
132 sc->sc_gp.gp_pin_write = admgpio_pin_write;
133 sc->sc_gp.gp_pin_ctl = admgpio_pin_ctl;
134
135 gba.gba_gc = &sc->sc_gp;
136 gba.gba_pins = &sc->sc_pins[0];
137 gba.gba_npins = __arraycount(sc->sc_pins);
138
139 /* Attach GPIO framework */
140 return config_found(sc->sc_dev, &gba, gpiobus_print,
141 CFARGS(.iattr = "gpiobus"));
142 }
143