1 /*        $NetBSD: wdc_mainbus.c,v 1.7 2019/09/09 22:01:23 jdolecek Exp $       */
2 /*
3  * Copyright (c) 2010 KIYOHARA Takashi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  *
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: wdc_mainbus.c,v 1.7 2019/09/09 22:01:23 jdolecek Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/errno.h>
36 
37 #include <machine/autoconf.h>
38 #include <machine/intr.h>
39 #include <machine/mmeye.h>
40 
41 #include <dev/ic/wdcreg.h>
42 #include <dev/ata/atavar.h>
43 #include <dev/ic/wdcvar.h>
44 
45 #include "locators.h"
46 
47 #define   WDC_MAINBUS_REG_NPORTS                  8
48 #define   WDC_MAINBUS_AUXREG_OFFSET     0x206
49 #define   WDC_MAINBUS_AUXREG_NPORTS     1
50 
51 /* options passed via the 'flags' config keyword */
52 #define WDC_OPTIONS_32                            0x01 /* try to use 32bit data I/O */
53 #define WDC_OPTIONS_ATA_NOSTREAM        0x04
54 #define WDC_OPTIONS_ATAPI_NOSTREAM      0x08
55 
56 struct wdc_mainbus_softc {
57           struct    wdc_softc sc_wdcdev;
58           struct    ata_channel *wdc_chanlist[1];
59           struct    ata_channel ata_channel;
60           struct    wdc_regs wdc_regs;
61 };
62 
63 static int wdc_mainbus_match(device_t, cfdata_t, void *);
64 static void wdc_mainbus_attach(device_t, device_t, void *);
65 
66 CFATTACH_DECL_NEW(wdc_mainbus, sizeof(struct wdc_mainbus_softc),
67     wdc_mainbus_match, wdc_mainbus_attach, NULL, NULL);
68 
69 static int
wdc_mainbus_match(device_t parent,cfdata_t match,void * aux)70 wdc_mainbus_match(device_t parent, cfdata_t match, void *aux)
71 {
72           struct mainbus_attach_args *ma = aux;
73           struct wdc_regs wdr;
74           int result = 0, i;
75 
76           if (strcmp(ma->ma_name, match->cf_name) != 0)
77                     return 0;
78 
79           /* Disallow wildcarded values. */
80           if (ma->ma_addr1 == MAINBUSCF_ADDR1_DEFAULT ||
81               ma->ma_irq1 == MAINBUSCF_IRQ1_DEFAULT)
82                     return 0;
83 
84           wdr.cmd_iot = SH3_BUS_SPACE_PCMCIA_IO;
85           if (bus_space_map(wdr.cmd_iot, ma->ma_addr1,
86               WDC_MAINBUS_REG_NPORTS, 0, &wdr.cmd_baseioh) != 0)
87                     goto out;
88 
89           for (i = 0; i < WDC_MAINBUS_REG_NPORTS; i++) {
90                     if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, i,
91                         i == 0 ? 4 : 1, &wdr.cmd_iohs[i]) != 0)
92                               goto outunmap;
93           }
94           wdc_init_shadow_regs(&wdr);
95 
96           wdr.ctl_iot = SH3_BUS_SPACE_PCMCIA_IO;
97           if (bus_space_map(wdr.ctl_iot, ma->ma_addr1 + WDC_MAINBUS_AUXREG_OFFSET,
98               WDC_MAINBUS_AUXREG_NPORTS, 0, &wdr.ctl_ioh) != 0)
99                     goto outunmap;
100 
101 #if 0
102 bus_space_write_1(iot, ioh, 0x200, 0x80);
103 delay(1000);
104 bus_space_write_1(iot, ioh, 0x200, 0x00);
105 delay(1000);
106 printf("CF COR=0x%x\n", bus_space_read_1(iot, ioh, 0x200));
107 bus_space_write_1(iot, ioh, 0x200, 0x41);
108 printf("CF COR=0x%x\n", bus_space_read_1(iot, ioh, 0x200));
109 delay(1000000);
110 #endif
111           result = wdcprobe(&wdr);
112 
113           bus_space_unmap(wdr.ctl_iot, wdr.ctl_ioh, WDC_MAINBUS_AUXREG_NPORTS);
114 outunmap:
115           bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, WDC_MAINBUS_REG_NPORTS);
116 out:
117           return result;
118 }
119 
120 static void
wdc_mainbus_attach(device_t parent,device_t self,void * aux)121 wdc_mainbus_attach(device_t parent, device_t self, void *aux)
122 {
123           struct wdc_mainbus_softc *sc = device_private(self);
124           struct mainbus_attach_args *ma = aux;
125           struct wdc_regs *wdr;
126           int wdc_cf_flags = device_cfdata(self)->cf_flags;
127           int i;
128 
129           sc->sc_wdcdev.sc_atac.atac_dev = self;
130           sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
131           wdr->cmd_iot = SH3_BUS_SPACE_PCMCIA_IO;
132           wdr->ctl_iot = SH3_BUS_SPACE_PCMCIA_IO;
133           if (bus_space_map(wdr->cmd_iot, ma->ma_addr1,
134                 WDC_MAINBUS_REG_NPORTS, 0, &wdr->cmd_baseioh) ||
135               bus_space_map(wdr->ctl_iot,
136                 ma->ma_addr1 + WDC_MAINBUS_AUXREG_OFFSET,
137                 WDC_MAINBUS_AUXREG_NPORTS, 0, &wdr->ctl_ioh)) {
138                     aprint_error(": couldn't map registers\n");
139                     return;
140           }
141           for (i = 0; i < WDC_MAINBUS_REG_NPORTS; i++) {
142                     if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i,
143                         i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
144                               aprint_error(": couldn't subregion registers (3)\n");
145                               return;
146                     }
147           }
148 
149           wdr->data32iot = wdr->cmd_iot;
150           wdr->data32ioh = wdr->cmd_iohs[0];
151 
152           sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
153           sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
154           if (wdc_cf_flags & WDC_OPTIONS_32)
155                     sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
156           if (wdc_cf_flags & WDC_OPTIONS_ATA_NOSTREAM)
157                     sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATA_NOSTREAM;
158           if (wdc_cf_flags & WDC_OPTIONS_ATAPI_NOSTREAM)
159                     sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATAPI_NOSTREAM;
160 
161           sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
162           sc->wdc_chanlist[0] = &sc->ata_channel;
163           sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
164           sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
165           sc->sc_wdcdev.wdc_maxdrives = 2;
166           sc->ata_channel.ch_channel = 0;
167           sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
168 
169           wdc_init_shadow_regs(wdr);
170 
171           aprint_normal("\n");
172 
173           mmeye_intr_establish(ma->ma_irq1, IST_LEVEL, IPL_BIO,
174               wdcintr, &sc->ata_channel);
175 
176           wdcattach(&sc->ata_channel);
177 }
178