1 /* $NetBSD: zs_hb.c,v 1.30 2023/10/25 12:59:09 tsutsui Exp $ */
2
3 /*-
4 * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Gordon W. Ross.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Zilog Z8530 Dual UART driver (machine-dependent part)
34 *
35 * Runs two serial lines per chip using slave drivers.
36 * Plain tty/async lines use the zs_async slave.
37 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
38 */
39
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: zs_hb.c,v 1.30 2023/10/25 12:59:09 tsutsui Exp $");
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/device.h>
46 #include <sys/tty.h>
47 #include <sys/conf.h>
48 #include <sys/cpu.h>
49 #include <sys/intr.h>
50
51 #include <mips/locore.h>
52
53 #include <machine/adrsmap.h>
54 #include <machine/z8530var.h>
55
56 #include <dev/cons.h>
57 #include <dev/ic/z8530reg.h>
58
59 #include <newsmips/dev/hbvar.h>
60
61 #include "zsc.h" /* NZSC */
62 #define NZS NZSC
63
64 /* Make life easier for the initialized arrays here. */
65 #if NZS < 2
66 #undef NZS
67 #define NZS 2
68 #endif
69
70 #define ZSCFLAG_EX 0x01 /* expansion board */
71
72 /*
73 * The news3400 provides a 4.9152 MHz clock to the ZS chips.
74 */
75 #define PCLK (9600 * 512) /* PCLK pin input clock rate */
76 #define PCLK_EX (9600 * 384)
77
78 /*
79 * Define interrupt levels.
80 */
81 #define ZSHARD_PRI 64
82
83 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);}
84
85 /* The layout of this is hardware-dependent (padding, order). */
86 struct zschan {
87 volatile uint8_t zc_csr; /* ctrl,status, and indirect access */
88 volatile uint8_t zc_data; /* data */
89 };
90 struct zsdevice {
91 /* Yes, they are backwards. */
92 struct zschan zs_chan_b;
93 struct zschan zs_chan_a;
94 };
95
96 extern int zs_def_cflag;
97
98 static struct zsdevice *zsaddr[NZS];
99
100 /* Flags from cninit() */
101 static int zs_hwflags[NZS][2];
102
103 /* Default speed for all channels */
104 static int zs_defspeed = 9600;
105
106 static uint8_t zs_init_reg[16] = {
107 0, /* 0: CMD (reset, etc.) */
108 0, /* 1: No interrupts yet. */
109 ZSHARD_PRI, /* IVECT */
110 ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
111 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
112 ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
113 0, /* 6: TXSYNC/SYNCLO */
114 0, /* 7: RXSYNC/SYNCHI */
115 0, /* 8: alias for data port */
116 ZSWR9_MASTER_IE,
117 0, /*10: Misc. TX/RX control bits */
118 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
119 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
120 0, /*13: BAUDHI (default=9600) */
121 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
122 ZSWR15_BREAK_IE,
123 };
124
125 static struct zschan * zs_get_chan_addr(int, int);
126 static void zs_hb_delay(void);
127 static int zshard_hb(void *);
128 static int zs_getc(void *);
129 static void zs_putc(void *, int);
130
131 struct zschan *
zs_get_chan_addr(int zs_unit,int channel)132 zs_get_chan_addr(int zs_unit, int channel)
133 {
134 struct zsdevice *addr;
135 struct zschan *zc;
136
137 if (zs_unit >= NZS)
138 return NULL;
139 addr = zsaddr[zs_unit];
140 if (addr == NULL)
141 return NULL;
142 if (channel == 0) {
143 zc = &addr->zs_chan_a;
144 } else {
145 zc = &addr->zs_chan_b;
146 }
147 return zc;
148 }
149
150 static void
zs_hb_delay(void)151 zs_hb_delay(void)
152 {
153
154 ZS_DELAY();
155 }
156
157 /****************************************************************
158 * Autoconfig
159 ****************************************************************/
160
161 /* Definition of the driver for autoconfig. */
162 int zs_hb_match(device_t, cfdata_t, void *);
163 void zs_hb_attach(device_t, device_t, void *);
164
165 CFATTACH_DECL_NEW(zsc_hb, sizeof(struct zsc_softc),
166 zs_hb_match, zs_hb_attach, NULL, NULL);
167
168 /*
169 * Is the zs chip present?
170 */
171 int
zs_hb_match(device_t parent,cfdata_t cf,void * aux)172 zs_hb_match(device_t parent, cfdata_t cf, void *aux)
173 {
174 struct hb_attach_args *ha = aux;
175
176 if (strcmp(ha->ha_name, "zsc"))
177 return 0;
178
179 /* This returns -1 on a fault (bus error). */
180 if (hb_badaddr((char *)ha->ha_addr, 1))
181 return 0;
182
183 return 1;
184 }
185
186 /*
187 * Attach a found zs.
188 *
189 * Match slave number to zs unit number, so that misconfiguration will
190 * not set up the keyboard as ttya, etc.
191 */
192 void
zs_hb_attach(device_t parent,device_t self,void * aux)193 zs_hb_attach(device_t parent, device_t self, void *aux)
194 {
195 struct zsc_softc *zsc = device_private(self);
196 struct hb_attach_args *ha = aux;
197 struct zsc_attach_args zsc_args;
198 volatile struct zschan *zc;
199 struct zs_chanstate *cs;
200 int s, zs_unit, channel, intlevel;
201
202 zsc->zsc_dev = self;
203 zs_unit = device_unit(self);
204 intlevel = ha->ha_level;
205 zsaddr[zs_unit] = (void *)ha->ha_addr;
206
207 if (intlevel == -1) {
208 #if 0
209 aprint_error(": interrupt level not configured\n");
210 return;
211 #else
212 aprint_error(": interrupt level not configured; using");
213 intlevel = 1;
214 #endif
215 }
216
217 aprint_normal(" level %d\n", intlevel);
218
219 zs_delay = zs_hb_delay;
220
221 /*
222 * Initialize software state for each channel.
223 */
224 for (channel = 0; channel < 2; channel++) {
225 zsc_args.channel = channel;
226 zsc_args.hwflags = zs_hwflags[zs_unit][channel];
227 cs = &zsc->zsc_cs_store[channel];
228 zsc->zsc_cs[channel] = cs;
229
230 zs_lock_init(cs);
231 cs->cs_channel = channel;
232 cs->cs_private = NULL;
233 cs->cs_ops = &zsops_null;
234 if ((device_cfdata(self)->cf_flags & ZSCFLAG_EX) == 0)
235 cs->cs_brg_clk = PCLK / 16;
236 else
237 cs->cs_brg_clk = PCLK_EX / 16;
238
239 zc = zs_get_chan_addr(zs_unit, channel);
240 cs->cs_reg_csr = &zc->zc_csr;
241 cs->cs_reg_data = &zc->zc_data;
242
243 memcpy(cs->cs_creg, zs_init_reg, 16);
244 memcpy(cs->cs_preg, zs_init_reg, 16);
245
246 /* XXX: Get these from the EEPROM instead? */
247 /* XXX: See the mvme167 code. Better. */
248 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
249 cs->cs_defspeed = zs_get_speed(cs);
250 else
251 cs->cs_defspeed = zs_defspeed;
252 cs->cs_defcflag = zs_def_cflag;
253
254 /* Make these correspond to cs_defcflag (-crtscts) */
255 cs->cs_rr0_dcd = ZSRR0_DCD;
256 cs->cs_rr0_cts = 0;
257 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
258 cs->cs_wr5_rts = 0;
259
260 /*
261 * Clear the master interrupt enable.
262 * The INTENA is common to both channels,
263 * so just do it on the A channel.
264 */
265 if (channel == 0) {
266 zs_write_reg(cs, 9, 0);
267 }
268
269 /*
270 * Look for a child driver for this channel.
271 * The child attach will setup the hardware.
272 */
273 if (!config_found(self, (void *)&zsc_args, zs_print,
274 CFARGS_NONE)) {
275 /* No sub-driver. Just reset it. */
276 uint8_t reset = (channel == 0) ?
277 ZSWR9_A_RESET : ZSWR9_B_RESET;
278 s = splhigh();
279 zs_write_reg(cs, 9, reset);
280 splx(s);
281 }
282 }
283
284 /*
285 * Now safe to install interrupt handlers. Note the arguments
286 * to the interrupt handlers aren't used. Note, we only do this
287 * once since both SCCs interrupt at the same level and vector.
288 */
289 zsc->zsc_si = softint_establish(SOFTINT_SERIAL,
290 (void (*)(void *))zsc_intr_soft, zsc);
291 hb_intr_establish(intlevel, INTST1_SCC, IPL_SERIAL, zshard_hb, zsc);
292 /* XXX; evcnt_attach() ? */
293
294 /*
295 * Set the master interrupt enable and interrupt vector.
296 * (common to both channels, do it on A)
297 */
298 cs = zsc->zsc_cs[0];
299 s = splhigh();
300 /* interrupt vector */
301 zs_write_reg(cs, 2, zs_init_reg[2]);
302 /* master interrupt control (enable) */
303 zs_write_reg(cs, 9, zs_init_reg[9]);
304 splx(s);
305 }
306
307 static int
zshard_hb(void * arg)308 zshard_hb(void *arg)
309 {
310 int rv;
311
312 (void) *(volatile u_char *)SCCVECT;
313 rv = zshard(arg);
314
315 /* XXX news3400 sometimes losts zs interrupt */
316 if (rv)
317 zshard(arg);
318
319 return rv;
320 }
321
322 /*
323 * Polled input char.
324 */
325 int
zs_getc(void * arg)326 zs_getc(void *arg)
327 {
328 volatile struct zschan *zc = arg;
329 int s, c, rr0;
330
331 s = splhigh();
332 /* Wait for a character to arrive. */
333 do {
334 rr0 = zc->zc_csr;
335 ZS_DELAY();
336 } while ((rr0 & ZSRR0_RX_READY) == 0);
337
338 c = zc->zc_data;
339 ZS_DELAY();
340 splx(s);
341
342 /*
343 * This is used by the kd driver to read scan codes,
344 * so don't translate '\r' ==> '\n' here...
345 */
346 return c;
347 }
348
349 /*
350 * Polled output char.
351 */
352 void
zs_putc(void * arg,int c)353 zs_putc(void *arg, int c)
354 {
355 volatile struct zschan *zc = arg;
356 int s, rr0;
357
358 s = splhigh();
359 /* Wait for transmitter to become ready. */
360 do {
361 rr0 = zc->zc_csr;
362 ZS_DELAY();
363 } while ((rr0 & ZSRR0_TX_READY) == 0);
364
365 zc->zc_data = c;
366 ZS_DELAY();
367 splx(s);
368 }
369
370 /*****************************************************************/
371
372 static void zscnprobe(struct consdev *);
373 static void zscninit(struct consdev *);
374 static int zscngetc(dev_t);
375 static void zscnputc(dev_t, int);
376
377 struct consdev consdev_zs = {
378 zscnprobe,
379 zscninit,
380 zscngetc,
381 zscnputc,
382 nullcnpollc,
383 NULL,
384 NULL,
385 NULL,
386 NODEV,
387 CN_DEAD
388 };
389
390 static void
zscnprobe(struct consdev * cn)391 zscnprobe(struct consdev *cn)
392 {
393 }
394
395 static void
zscninit(struct consdev * cn)396 zscninit(struct consdev *cn)
397 {
398 extern const struct cdevsw zstty_cdevsw;
399
400 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
401 cn->cn_pri = CN_REMOTE;
402 zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE;
403 }
404
405 static int
zscngetc(dev_t dev)406 zscngetc(dev_t dev)
407 {
408
409 return zs_getc((void *)SCCPORT0A);
410 }
411
412 static void
zscnputc(dev_t dev,int c)413 zscnputc(dev_t dev, int c)
414 {
415
416 zs_putc((void *)SCCPORT0A, c);
417 }
418