1 /* $NetBSD: enable.h,v 1.3 2013/09/06 17:43:19 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jeremy Cooper. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * System Enable Register 34 * The Sun3x System Enable Register controls the function of a few 35 * on-board devices and general system operation. It is cleared when 36 * the system is reset. 37 * 38 * 15 0 39 * +---+---+---+---+---+---+---+---+---+---+---+---+---+---.---.---+ 40 * |BT |FPP|DMA| 0 |VID|RES|FPA|DIA| 0 |CCH|IOC|LBK|DCH| UNUSED | 41 * +---+---+---+---+---+---+---+---+---+---+---+---+---+---.---.---+ 42 * 43 * 44 * Bits in the Enable Register defined. 45 */ 46 #define ENA_DBGCACHE 0x0008 /* Debug mode for system cache */ 47 #define ENA_LOOPBACK 0x0010 /* VME loopback mode */ 48 #define ENA_IOCACHE 0x0020 /* Enable I/O cache */ 49 #define ENA_CACHE 0x0040 /* Enable system cache */ 50 #define ENA_DIAG 0x0100 /* Diagnostic switch */ 51 #define ENA_FPA 0x0200 /* Enable floating point acc. */ 52 #define ENA_RES 0x0400 /* Video display resolution (0 => hi, 1 => low) */ 53 #define ENA_VIDEO 0x0800 /* Enable video display */ 54 #define ENA_SDVMA 0x2000 /* Enable system DVMA */ 55 #define ENA_FPP 0x4000 /* Enable floating point coprocessor */ 56 #define ENA_NOTBOOT 0x8000 /* Non-boot state (0 => boot, 1 => normal) */ 57 58 #ifdef _KERNEL 59 extern volatile short *enable_reg; 60 #endif 61 62