1 /* $NetBSD: if_athn_cardbus.c,v 1.3 2022/09/25 17:33:19 thorpej Exp $ */
2 /* $OpenBSD: if_athn_cardbus.c,v 1.13 2011/01/08 10:02:32 damien Exp $ */
3
4 /*-
5 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 /*
21 * CardBus front-end for Atheros 802.11a/g/n chipsets.
22 */
23
24 #include <sys/cdefs.h>
25 __KERNEL_RCSID(0, "$NetBSD: if_athn_cardbus.c,v 1.3 2022/09/25 17:33:19 thorpej Exp $");
26
27 #include "opt_inet.h"
28
29 #include <sys/param.h>
30 #include <sys/sockio.h>
31 #include <sys/mbuf.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/callout.h>
36 #include <sys/device.h>
37
38 #include <sys/bus.h>
39 #include <sys/intr.h>
40
41 #include <net/if.h>
42 #include <net/if_ether.h>
43 #include <net/if_media.h>
44
45 #include <net80211/ieee80211_var.h>
46 #include <net80211/ieee80211_amrr.h>
47 #include <net80211/ieee80211_radiotap.h>
48
49 #include <dev/ic/athnreg.h>
50 #include <dev/ic/athnvar.h>
51
52 #include <dev/pci/pcireg.h>
53 #include <dev/pci/pcivar.h>
54 #include <dev/pci/pcidevs.h>
55
56 #include <dev/cardbus/cardbusvar.h>
57
58 /*
59 * PCI configuration space registers
60 */
61 #define ATHN_PCI_MMBA PCI_BAR(0) /* memory mapped base */
62
63 struct athn_cardbus_softc {
64 struct athn_softc csc_sc;
65
66 /* CardBus specific goo. */
67 cardbus_devfunc_t csc_ct;
68 pcitag_t csc_tag;
69 void *csc_ih;
70 bus_space_tag_t csc_iot;
71 bus_space_handle_t csc_ioh;
72 bus_size_t csc_mapsz;
73 pcireg_t csc_bar_val;
74 };
75
76 #define Static static
77
78 Static int athn_cardbus_match(device_t, cfdata_t, void *);
79 Static void athn_cardbus_attach(device_t, device_t, void *);
80 Static int athn_cardbus_detach(device_t, int);
81
82 CFATTACH_DECL_NEW(athn_cardbus, sizeof(struct athn_cardbus_softc),
83 athn_cardbus_match, athn_cardbus_attach, athn_cardbus_detach, NULL);
84
85 Static uint32_t athn_cardbus_read(struct athn_softc *, uint32_t);
86 Static bool athn_cardbus_resume(device_t, const pmf_qual_t *l);
87 Static void athn_cardbus_setup(struct athn_cardbus_softc *);
88 Static bool athn_cardbus_suspend(device_t, const pmf_qual_t *);
89 Static void athn_cardbus_write(struct athn_softc *, uint32_t, uint32_t);
90 Static void athn_cardbus_write_barrier(struct athn_softc *);
91
92 #ifdef openbsd_power_management
93 Static int athn_cardbus_enable(struct athn_softc *);
94 Static void athn_cardbus_disable(struct athn_softc *);
95 Static void athn_cardbus_power(struct athn_softc *, int);
96 #endif /* openbsd_power_management */
97
98 Static int
athn_cardbus_match(device_t parent,cfdata_t match,void * aux)99 athn_cardbus_match(device_t parent, cfdata_t match, void *aux)
100 {
101 static const struct {
102 pci_vendor_id_t vendor;
103 pci_product_id_t product;
104 } athn_cardbus_devices[] = {
105 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5416 },
106 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5418 },
107 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9160 },
108 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9280 },
109 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9281 },
110 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9285 },
111 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR2427 },
112 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9227 },
113 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9287 },
114 { PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9300 }
115 };
116 struct cardbus_attach_args *ca = aux;
117 size_t i;
118
119 for (i = 0; i < __arraycount(athn_cardbus_devices); i++) {
120 if (PCI_VENDOR(ca->ca_id) == athn_cardbus_devices[i].vendor &&
121 PCI_VENDOR(ca->ca_id) == athn_cardbus_devices[i].product)
122 return 1;
123 }
124 return 0;
125 }
126
127 Static void
athn_cardbus_attach(device_t parent,device_t self,void * aux)128 athn_cardbus_attach(device_t parent, device_t self, void *aux)
129 {
130 struct athn_cardbus_softc *csc = device_private(self);
131 struct athn_softc *sc = &csc->csc_sc;
132 struct ieee80211com *ic = &sc->sc_ic;
133 struct cardbus_attach_args *ca = aux;
134 cardbus_devfunc_t ct = ca->ca_ct;
135 bus_addr_t base;
136 int error;
137
138 sc->sc_dmat = ca->ca_dmat;
139 csc->csc_ct = ct;
140 csc->csc_tag = ca->ca_tag;
141
142 aprint_normal("\n");
143 aprint_naive("\n");
144
145 #ifdef openbsd_power_management
146 /* Power management hooks. */
147 sc->sc_enable = athn_cardbus_enable;
148 sc->sc_disable = athn_cardbus_disable;
149 sc->sc_power = athn_cardbus_power;
150 #endif
151 sc->sc_ops.read = athn_cardbus_read;
152 sc->sc_ops.write = athn_cardbus_write;
153 sc->sc_ops.write_barrier = athn_cardbus_write_barrier;
154
155 /*
156 * Map control/status registers.
157 */
158 error = Cardbus_mapreg_map(ct, ATHN_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0,
159 &csc->csc_iot, &csc->csc_ioh, &base, &csc->csc_mapsz);
160 if (error != 0) {
161 aprint_error_dev(self, "unable to map device (%d)\n", error);
162 return;
163 }
164 csc->csc_bar_val = base | PCI_MAPREG_TYPE_MEM;
165
166 /*
167 * Set up the PCI configuration registers.
168 */
169 athn_cardbus_setup(csc);
170
171 if (athn_attach(sc) != 0) {
172 Cardbus_mapreg_unmap(ct, ATHN_PCI_MMBA, csc->csc_iot,
173 csc->csc_ioh, csc->csc_mapsz);
174 return;
175 }
176
177 if (pmf_device_register(self,
178 athn_cardbus_suspend, athn_cardbus_resume)) {
179 pmf_class_network_register(self, &sc->sc_if);
180 pmf_device_suspend(self, &sc->sc_qual);
181 } else
182 aprint_error_dev(self, "couldn't establish power handler\n");
183
184 // Cardbus_function_disable(ct);
185
186 ieee80211_announce(ic);
187 }
188
189 Static int
athn_cardbus_detach(device_t self,int flags)190 athn_cardbus_detach(device_t self, int flags)
191 {
192 struct athn_cardbus_softc *csc = device_private(self);
193 struct athn_softc *sc = &csc->csc_sc;
194 cardbus_devfunc_t ct = csc->csc_ct;
195 cardbus_chipset_tag_t cc = ct->ct_cc;
196 cardbus_function_tag_t cf = ct->ct_cf;
197
198 athn_detach(sc);
199
200 pmf_device_deregister(self);
201
202 /* Unhook the interrupt handler. */
203 if (csc->csc_ih != NULL)
204 cardbus_intr_disestablish(cc, cf, csc->csc_ih);
205
206 /* Release bus space and close window. */
207 Cardbus_mapreg_unmap(ct, ATHN_PCI_MMBA, csc->csc_iot, csc->csc_ioh,
208 csc->csc_mapsz);
209
210 return 0;
211 }
212
213 Static void
athn_cardbus_setup(struct athn_cardbus_softc * csc)214 athn_cardbus_setup(struct athn_cardbus_softc *csc)
215 {
216 cardbus_devfunc_t ct = csc->csc_ct;
217 #ifdef unneeded /* XXX */
218 pci_chipset_tag_t pc = csc->csc_pc;
219 cardbus_chipset_tag_t cc = ct->ct_cc;
220 cardbus_function_tag_t cf = ct->ct_cf;
221 #endif
222 pcireg_t reg;
223 int rc;
224
225 if ((rc = cardbus_set_powerstate(ct, csc->csc_tag, PCI_PWR_D0)) != 0)
226 aprint_debug("%s: cardbus_set_powerstate %d\n", __func__, rc);
227
228 /* Program the BAR. */
229 Cardbus_conf_write(ct, csc->csc_tag, ATHN_PCI_MMBA, csc->csc_bar_val);
230
231 #ifdef unneeded /* XXX */
232 /* Make sure the right access type is on the cardbus bridge. */
233 (*cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE);
234 (*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
235 #endif
236 /* Enable the appropriate bits in the PCI CSR. */
237 reg = Cardbus_conf_read(ct, csc->csc_tag, PCI_COMMAND_STATUS_REG);
238 reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
239 Cardbus_conf_write(ct, csc->csc_tag, PCI_COMMAND_STATUS_REG, reg);
240
241 /*
242 * Noone knows why this shit is necessary but there are claims that
243 * not doing this may cause very frequent PCI FATAL interrupts from
244 * the card: http://bugzilla.kernel.org/show_bug.cgi?id=13483
245 */
246 reg = Cardbus_conf_read(ct, csc->csc_tag, 0x40);
247 if (reg & 0xff00)
248 Cardbus_conf_write(ct, csc->csc_tag, 0x40, reg & ~0xff00);
249
250 /* Change latency timer; default value yields poor results. */
251 reg = Cardbus_conf_read(ct, csc->csc_tag, PCI_BHLC_REG);
252 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
253 reg |= 168 << PCI_LATTIMER_SHIFT;
254 Cardbus_conf_write(ct, csc->csc_tag, PCI_BHLC_REG, reg);
255 }
256
257 Static uint32_t
athn_cardbus_read(struct athn_softc * sc,uint32_t addr)258 athn_cardbus_read(struct athn_softc *sc, uint32_t addr)
259 {
260 struct athn_cardbus_softc *csc = (struct athn_cardbus_softc *)sc;
261
262 return bus_space_read_4(csc->csc_iot, csc->csc_ioh, addr);
263 }
264
265 Static void
athn_cardbus_write(struct athn_softc * sc,uint32_t addr,uint32_t val)266 athn_cardbus_write(struct athn_softc *sc, uint32_t addr, uint32_t val)
267 {
268 struct athn_cardbus_softc *csc = (struct athn_cardbus_softc *)sc;
269
270 bus_space_write_4(csc->csc_iot, csc->csc_ioh, addr, val);
271 }
272
273 Static void
athn_cardbus_write_barrier(struct athn_softc * sc)274 athn_cardbus_write_barrier(struct athn_softc *sc)
275 {
276 struct athn_cardbus_softc *csc = (struct athn_cardbus_softc *)sc;
277
278 bus_space_barrier(csc->csc_iot, csc->csc_ioh, 0, csc->csc_mapsz,
279 BUS_SPACE_BARRIER_WRITE);
280 }
281
282 Static bool
athn_cardbus_suspend(device_t self,const pmf_qual_t * qual)283 athn_cardbus_suspend(device_t self, const pmf_qual_t *qual)
284 {
285 struct athn_cardbus_softc *csc = device_private(self);
286
287 athn_suspend(&csc->csc_sc);
288 if (csc->csc_ih != NULL) {
289 Cardbus_intr_disestablish(csc->csc_ct, csc->csc_ih);
290 csc->csc_ih = NULL;
291 }
292 return true;
293 }
294
295 Static bool
athn_cardbus_resume(device_t self,const pmf_qual_t * qual)296 athn_cardbus_resume(device_t self, const pmf_qual_t *qual)
297 {
298 struct athn_cardbus_softc *csc = device_private(self);
299
300 csc->csc_ih = Cardbus_intr_establish(csc->csc_ct, IPL_NET, athn_intr,
301 &csc->csc_sc);
302
303 if (csc->csc_ih == NULL) {
304 aprint_error_dev(self,
305 "unable to establish interrupt\n");
306 return false;
307 }
308 return athn_resume(&csc->csc_sc);
309 }
310
311 /************************************************************************
312 * XXX: presumably the pmf_* stuff handles this.
313 */
314 #ifdef openbsd_power_management
315 Static int
athn_cardbus_enable(struct athn_softc * sc)316 athn_cardbus_enable(struct athn_softc *sc)
317 {
318 struct athn_cardbus_softc *csc = (struct athn_cardbus_softc *)sc;
319 cardbus_devfunc_t ct = csc->csc_ct;
320 cardbus_chipset_tag_t cc = ct->ct_cc;
321 cardbus_function_tag_t cf = ct->ct_cf;
322
323 /* Power on the socket. */
324 Cardbus_function_enable(ct);
325
326 /* Setup the PCI configuration registers. */
327 athn_cardbus_setup(csc);
328
329 /* Map and establish the interrupt handler. */
330 csc->csc_ih = cardbus_intr_establish(cc, cf, IPL_NET, athn_intr, sc);
331 if (csc->csc_ih == NULL) {
332 printf("%s: could not establish interrupt at %d\n",
333 device_xname(sc->sc_dev), csc->csc_intrline);
334 Cardbus_function_disable(ct);
335 return 1;
336 }
337 return 0;
338 }
339
340 Static void
athn_cardbus_disable(struct athn_softc * sc)341 athn_cardbus_disable(struct athn_softc *sc)
342 {
343 struct athn_cardbus_softc *csc = (struct athn_cardbus_softc *)sc;
344 cardbus_devfunc_t ct = csc->csc_ct;
345 cardbus_chipset_tag_t cc = ct->ct_cc;
346 cardbus_function_tag_t cf = ct->ct_cf;
347
348 /* Unhook the interrupt handler. */
349 cardbus_intr_disestablish(cc, cf, csc->csc_ih);
350 csc->csc_ih = NULL;
351
352 /* Power down the socket. */
353 Cardbus_function_disable(ct);
354 }
355
356 Static void
athn_cardbus_power(struct athn_softc * sc,int why)357 athn_cardbus_power(struct athn_softc *sc, int why)
358 {
359 struct athn_cardbus_softc *csc = (struct athn_cardbus_softc *)sc;
360
361 if (why == DVACT_RESUME) {
362 /* Restore the PCI configuration registers. */
363 athn_cardbus_setup(csc);
364 }
365 }
366 #endif /* openbsd_power_management */
367